diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h | 130 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h | 34 |
6 files changed, 192 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h index e443738f..c04b01c1 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_bus_gp10b.h | |||
@@ -66,10 +66,30 @@ static inline u32 bus_bar1_block_mode_virtual_f(void) | |||
66 | { | 66 | { |
67 | return 0x80000000; | 67 | return 0x80000000; |
68 | } | 68 | } |
69 | static inline u32 bus_bar2_block_r(void) | ||
70 | { | ||
71 | return 0x00001714; | ||
72 | } | ||
73 | static inline u32 bus_bar2_block_ptr_f(u32 v) | ||
74 | { | ||
75 | return (v & 0xfffffff) << 0; | ||
76 | } | ||
77 | static inline u32 bus_bar2_block_target_vid_mem_f(void) | ||
78 | { | ||
79 | return 0x0; | ||
80 | } | ||
81 | static inline u32 bus_bar2_block_mode_virtual_f(void) | ||
82 | { | ||
83 | return 0x80000000; | ||
84 | } | ||
69 | static inline u32 bus_bar1_block_ptr_shift_v(void) | 85 | static inline u32 bus_bar1_block_ptr_shift_v(void) |
70 | { | 86 | { |
71 | return 0x0000000c; | 87 | return 0x0000000c; |
72 | } | 88 | } |
89 | static inline u32 bus_bar2_block_ptr_shift_v(void) | ||
90 | { | ||
91 | return 0x0000000c; | ||
92 | } | ||
73 | static inline u32 bus_intr_0_r(void) | 93 | static inline u32 bus_intr_0_r(void) |
74 | { | 94 | { |
75 | return 0x00001100; | 95 | return 0x00001100; |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h index 7872c19c..3b97c9da 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ctxsw_prog_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h index b79758d2..d2629b08 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -178,6 +178,10 @@ static inline u32 fifo_intr_0_lb_error_reset_f(void) | |||
178 | { | 178 | { |
179 | return 0x1000000; | 179 | return 0x1000000; |
180 | } | 180 | } |
181 | static inline u32 fifo_intr_0_replayable_fault_error_pending_f(void) | ||
182 | { | ||
183 | return 0x2000000; | ||
184 | } | ||
181 | static inline u32 fifo_intr_0_dropped_mmu_fault_pending_f(void) | 185 | static inline u32 fifo_intr_0_dropped_mmu_fault_pending_f(void) |
182 | { | 186 | { |
183 | return 0x8000000; | 187 | return 0x8000000; |
@@ -526,4 +530,128 @@ static inline u32 fifo_pbdma_status_chsw_in_progress_v(void) | |||
526 | { | 530 | { |
527 | return 0x00000001; | 531 | return 0x00000001; |
528 | } | 532 | } |
533 | static inline u32 fifo_replay_fault_buffer_lo_r(void) | ||
534 | { | ||
535 | return 0x00002a70; | ||
536 | } | ||
537 | static inline u32 fifo_replay_fault_buffer_lo_enable_v(u32 r) | ||
538 | { | ||
539 | return (r >> 0) & 0x1; | ||
540 | } | ||
541 | static inline u32 fifo_replay_fault_buffer_lo_enable_true_v(void) | ||
542 | { | ||
543 | return 0x00000001; | ||
544 | } | ||
545 | static inline u32 fifo_replay_fault_buffer_lo_enable_false_v(void) | ||
546 | { | ||
547 | return 0x00000000; | ||
548 | } | ||
549 | static inline u32 fifo_replay_fault_buffer_lo_base_f(u32 v) | ||
550 | { | ||
551 | return (v & 0xfffff) << 12; | ||
552 | } | ||
553 | static inline u32 fifo_replay_fault_buffer_lo_base_reset_v(void) | ||
554 | { | ||
555 | return 0x00000000; | ||
556 | } | ||
557 | static inline u32 fifo_replay_fault_buffer_hi_r(void) | ||
558 | { | ||
559 | return 0x00002a74; | ||
560 | } | ||
561 | static inline u32 fifo_replay_fault_buffer_hi_base_f(u32 v) | ||
562 | { | ||
563 | return (v & 0xffff) << 0; | ||
564 | } | ||
565 | static inline u32 fifo_replay_fault_buffer_hi_base_reset_v(void) | ||
566 | { | ||
567 | return 0x00000000; | ||
568 | } | ||
569 | static inline u32 fifo_replay_fault_buffer_size_r(void) | ||
570 | { | ||
571 | return 0x00002a78; | ||
572 | } | ||
573 | static inline u32 fifo_replay_fault_buffer_size_hw_f(u32 v) | ||
574 | { | ||
575 | return (v & 0x1ff) << 0; | ||
576 | } | ||
577 | static inline u32 fifo_replay_fault_buffer_size_hw_entries_v(void) | ||
578 | { | ||
579 | return 0x000000c0; | ||
580 | } | ||
581 | static inline u32 fifo_replay_fault_buffer_get_r(void) | ||
582 | { | ||
583 | return 0x00002a7c; | ||
584 | } | ||
585 | static inline u32 fifo_replay_fault_buffer_get_offset_hw_f(u32 v) | ||
586 | { | ||
587 | return (v & 0x1ff) << 0; | ||
588 | } | ||
589 | static inline u32 fifo_replay_fault_buffer_get_offset_hw_init_v(void) | ||
590 | { | ||
591 | return 0x00000000; | ||
592 | } | ||
593 | static inline u32 fifo_replay_fault_buffer_put_r(void) | ||
594 | { | ||
595 | return 0x00002a80; | ||
596 | } | ||
597 | static inline u32 fifo_replay_fault_buffer_put_offset_hw_f(u32 v) | ||
598 | { | ||
599 | return (v & 0x1ff) << 0; | ||
600 | } | ||
601 | static inline u32 fifo_replay_fault_buffer_put_offset_hw_init_v(void) | ||
602 | { | ||
603 | return 0x00000000; | ||
604 | } | ||
605 | static inline u32 fifo_replay_fault_buffer_info_r(void) | ||
606 | { | ||
607 | return 0x00002a84; | ||
608 | } | ||
609 | static inline u32 fifo_replay_fault_buffer_info_overflow_f(u32 v) | ||
610 | { | ||
611 | return (v & 0x1) << 0; | ||
612 | } | ||
613 | static inline u32 fifo_replay_fault_buffer_info_overflow_false_v(void) | ||
614 | { | ||
615 | return 0x00000000; | ||
616 | } | ||
617 | static inline u32 fifo_replay_fault_buffer_info_overflow_true_v(void) | ||
618 | { | ||
619 | return 0x00000001; | ||
620 | } | ||
621 | static inline u32 fifo_replay_fault_buffer_info_overflow_clear_v(void) | ||
622 | { | ||
623 | return 0x00000001; | ||
624 | } | ||
625 | static inline u32 fifo_replay_fault_buffer_info_write_nack_f(u32 v) | ||
626 | { | ||
627 | return (v & 0x1) << 24; | ||
628 | } | ||
629 | static inline u32 fifo_replay_fault_buffer_info_write_nack_false_v(void) | ||
630 | { | ||
631 | return 0x00000000; | ||
632 | } | ||
633 | static inline u32 fifo_replay_fault_buffer_info_write_nack_true_v(void) | ||
634 | { | ||
635 | return 0x00000001; | ||
636 | } | ||
637 | static inline u32 fifo_replay_fault_buffer_info_write_nack_clear_v(void) | ||
638 | { | ||
639 | return 0x00000001; | ||
640 | } | ||
641 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_f(u32 v) | ||
642 | { | ||
643 | return (v & 0x1) << 28; | ||
644 | } | ||
645 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_false_v(void) | ||
646 | { | ||
647 | return 0x00000000; | ||
648 | } | ||
649 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_true_v(void) | ||
650 | { | ||
651 | return 0x00000001; | ||
652 | } | ||
653 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_clear_v(void) | ||
654 | { | ||
655 | return 0x00000001; | ||
656 | } | ||
529 | #endif | 657 | #endif |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index 0bd707db..49078f11 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -1294,6 +1294,10 @@ static inline u32 gr_ds_zbc_color_fmt_val_rf32_gf32_bf32_af32_v(void) | |||
1294 | { | 1294 | { |
1295 | return 0x00000004; | 1295 | return 0x00000004; |
1296 | } | 1296 | } |
1297 | static inline u32 gr_ds_zbc_color_fmt_val_a8_b8_g8_r8_v(void) | ||
1298 | { | ||
1299 | return 0x00000028; | ||
1300 | } | ||
1297 | static inline u32 gr_ds_zbc_z_r(void) | 1301 | static inline u32 gr_ds_zbc_z_r(void) |
1298 | { | 1302 | { |
1299 | return 0x00405818; | 1303 | return 0x00405818; |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h index 21c592da..7d153b6f 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | |||
@@ -78,6 +78,10 @@ static inline u32 mc_intr_pfifo_pending_f(void) | |||
78 | { | 78 | { |
79 | return 0x100; | 79 | return 0x100; |
80 | } | 80 | } |
81 | static inline u32 mc_intr_replayable_fault_pending_f(void) | ||
82 | { | ||
83 | return 0x200; | ||
84 | } | ||
81 | static inline u32 mc_intr_pgraph_pending_f(void) | 85 | static inline u32 mc_intr_pgraph_pending_f(void) |
82 | { | 86 | { |
83 | return 0x1000; | 87 | return 0x1000; |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h index 509031e5..dea53f96 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -78,6 +78,38 @@ static inline u32 ram_in_page_dir_base_vol_true_f(void) | |||
78 | { | 78 | { |
79 | return 0x4; | 79 | return 0x4; |
80 | } | 80 | } |
81 | static inline u32 ram_in_page_dir_base_fault_replay_tex_f(u32 v) | ||
82 | { | ||
83 | return (v & 0x1) << 4; | ||
84 | } | ||
85 | static inline u32 ram_in_page_dir_base_fault_replay_tex_m(void) | ||
86 | { | ||
87 | return 0x1 << 4; | ||
88 | } | ||
89 | static inline u32 ram_in_page_dir_base_fault_replay_tex_w(void) | ||
90 | { | ||
91 | return 128; | ||
92 | } | ||
93 | static inline u32 ram_in_page_dir_base_fault_replay_tex_true_f(void) | ||
94 | { | ||
95 | return 0x10; | ||
96 | } | ||
97 | static inline u32 ram_in_page_dir_base_fault_replay_gcc_f(u32 v) | ||
98 | { | ||
99 | return (v & 0x1) << 5; | ||
100 | } | ||
101 | static inline u32 ram_in_page_dir_base_fault_replay_gcc_m(void) | ||
102 | { | ||
103 | return 0x1 << 5; | ||
104 | } | ||
105 | static inline u32 ram_in_page_dir_base_fault_replay_gcc_w(void) | ||
106 | { | ||
107 | return 128; | ||
108 | } | ||
109 | static inline u32 ram_in_page_dir_base_fault_replay_gcc_true_f(void) | ||
110 | { | ||
111 | return 0x20; | ||
112 | } | ||
81 | static inline u32 ram_in_big_page_size_f(u32 v) | 113 | static inline u32 ram_in_big_page_size_f(u32 v) |
82 | { | 114 | { |
83 | return (v & 0x1) << 11; | 115 | return (v & 0x1) << 11; |