diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | 50 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 6 |
4 files changed, 69 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 2421307f..53b85ad8 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -446,6 +446,34 @@ void channel_gk20a_disable(struct channel_gk20a *ch) | |||
446 | ccsr_channel_enable_clr_true_f()); | 446 | ccsr_channel_enable_clr_true_f()); |
447 | } | 447 | } |
448 | 448 | ||
449 | int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch) | ||
450 | { | ||
451 | struct tsg_gk20a *tsg; | ||
452 | |||
453 | if (gk20a_is_channel_marked_as_tsg(ch)) { | ||
454 | tsg = &g->fifo.tsg[ch->tsgid]; | ||
455 | gk20a_enable_tsg(tsg); | ||
456 | } else { | ||
457 | g->ops.fifo.enable_channel(ch); | ||
458 | } | ||
459 | |||
460 | return 0; | ||
461 | } | ||
462 | |||
463 | int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch) | ||
464 | { | ||
465 | struct tsg_gk20a *tsg; | ||
466 | |||
467 | if (gk20a_is_channel_marked_as_tsg(ch)) { | ||
468 | tsg = &g->fifo.tsg[ch->tsgid]; | ||
469 | gk20a_disable_tsg(tsg); | ||
470 | } else { | ||
471 | g->ops.fifo.disable_channel(ch); | ||
472 | } | ||
473 | |||
474 | return 0; | ||
475 | } | ||
476 | |||
449 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt) | 477 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt) |
450 | { | 478 | { |
451 | struct channel_gk20a_job *job, *n; | 479 | struct channel_gk20a_job *job, *n; |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 91ae0e7a..4f0632dd 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -205,6 +205,9 @@ void gk20a_channel_semaphore_wakeup(struct gk20a *g); | |||
205 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, | 205 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, |
206 | struct priv_cmd_entry **entry); | 206 | struct priv_cmd_entry **entry); |
207 | 207 | ||
208 | int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
209 | int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
210 | |||
208 | int gk20a_channel_suspend(struct gk20a *g); | 211 | int gk20a_channel_suspend(struct gk20a *g); |
209 | int gk20a_channel_resume(struct gk20a *g); | 212 | int gk20a_channel_resume(struct gk20a *g); |
210 | 213 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c index 5cd43329..4421744c 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -32,6 +32,36 @@ bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch) | |||
32 | return !(ch->tsgid == NVGPU_INVALID_TSG_ID); | 32 | return !(ch->tsgid == NVGPU_INVALID_TSG_ID); |
33 | } | 33 | } |
34 | 34 | ||
35 | int gk20a_enable_tsg(struct tsg_gk20a *tsg) | ||
36 | { | ||
37 | struct channel_gk20a *ch; | ||
38 | |||
39 | mutex_lock(&tsg->ch_list_lock); | ||
40 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { | ||
41 | gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid), | ||
42 | gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) | ||
43 | | ccsr_channel_enable_set_true_f()); | ||
44 | } | ||
45 | mutex_unlock(&tsg->ch_list_lock); | ||
46 | |||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | int gk20a_disable_tsg(struct tsg_gk20a *tsg) | ||
51 | { | ||
52 | struct channel_gk20a *ch; | ||
53 | |||
54 | mutex_lock(&tsg->ch_list_lock); | ||
55 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { | ||
56 | gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid), | ||
57 | gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) | ||
58 | | ccsr_channel_enable_clr_true_f()); | ||
59 | } | ||
60 | mutex_unlock(&tsg->ch_list_lock); | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
35 | static bool gk20a_is_channel_active(struct gk20a *g, struct channel_gk20a *ch) | 65 | static bool gk20a_is_channel_active(struct gk20a *g, struct channel_gk20a *ch) |
36 | { | 66 | { |
37 | struct fifo_gk20a *f = &g->fifo; | 67 | struct fifo_gk20a *f = &g->fifo; |
@@ -296,40 +326,26 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd, | |||
296 | 326 | ||
297 | case NVGPU_IOCTL_TSG_ENABLE: | 327 | case NVGPU_IOCTL_TSG_ENABLE: |
298 | { | 328 | { |
299 | struct channel_gk20a *ch; | ||
300 | err = gk20a_busy(g->dev); | 329 | err = gk20a_busy(g->dev); |
301 | if (err) { | 330 | if (err) { |
302 | gk20a_err(&g->dev->dev, | 331 | gk20a_err(&g->dev->dev, |
303 | "failed to host gk20a for ioctl cmd: 0x%x", cmd); | 332 | "failed to host gk20a for ioctl cmd: 0x%x", cmd); |
304 | return err; | 333 | return err; |
305 | } | 334 | } |
306 | mutex_lock(&tsg->ch_list_lock); | 335 | gk20a_enable_tsg(tsg); |
307 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { | ||
308 | gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid), | ||
309 | gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) | ||
310 | | ccsr_channel_enable_set_true_f()); | ||
311 | } | ||
312 | mutex_unlock(&tsg->ch_list_lock); | ||
313 | gk20a_idle(g->dev); | 336 | gk20a_idle(g->dev); |
314 | break; | 337 | break; |
315 | } | 338 | } |
316 | 339 | ||
317 | case NVGPU_IOCTL_TSG_DISABLE: | 340 | case NVGPU_IOCTL_TSG_DISABLE: |
318 | { | 341 | { |
319 | struct channel_gk20a *ch; | ||
320 | err = gk20a_busy(g->dev); | 342 | err = gk20a_busy(g->dev); |
321 | if (err) { | 343 | if (err) { |
322 | gk20a_err(&g->dev->dev, | 344 | gk20a_err(&g->dev->dev, |
323 | "failed to host gk20a for ioctl cmd: 0x%x", cmd); | 345 | "failed to host gk20a for ioctl cmd: 0x%x", cmd); |
324 | return err; | 346 | return err; |
325 | } | 347 | } |
326 | mutex_lock(&tsg->ch_list_lock); | 348 | gk20a_disable_tsg(tsg); |
327 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { | ||
328 | gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid), | ||
329 | gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) | ||
330 | | ccsr_channel_enable_clr_true_f()); | ||
331 | } | ||
332 | mutex_unlock(&tsg->ch_list_lock); | ||
333 | gk20a_idle(g->dev); | 349 | gk20a_idle(g->dev); |
334 | break; | 350 | break; |
335 | } | 351 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index 6178daa5..bcc4d0c4 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch); | 21 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch); |
22 | 22 | ||
23 | |||
23 | int gk20a_tsg_dev_release(struct inode *inode, struct file *filp); | 24 | int gk20a_tsg_dev_release(struct inode *inode, struct file *filp); |
24 | int gk20a_tsg_dev_open(struct inode *inode, struct file *filp); | 25 | int gk20a_tsg_dev_open(struct inode *inode, struct file *filp); |
25 | int gk20a_tsg_open(struct gk20a *g, struct file *filp); | 26 | int gk20a_tsg_open(struct gk20a *g, struct file *filp); |
@@ -50,4 +51,7 @@ struct tsg_gk20a { | |||
50 | struct vm_gk20a *vm; | 51 | struct vm_gk20a *vm; |
51 | }; | 52 | }; |
52 | 53 | ||
54 | int gk20a_enable_tsg(struct tsg_gk20a *tsg); | ||
55 | int gk20a_disable_tsg(struct tsg_gk20a *tsg); | ||
56 | |||
53 | #endif /* __TSG_GK20A_H_ */ | 57 | #endif /* __TSG_GK20A_H_ */ |