diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 1 |
4 files changed, 26 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index f829cb3a..3f22a1b7 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | |||
@@ -343,6 +343,14 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
343 | if (err) | 343 | if (err) |
344 | goto clean_up; | 344 | goto clean_up; |
345 | break; | 345 | break; |
346 | case NETLIST_REGIONID_NVPERF_PMCAU: | ||
347 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMCAU"); | ||
348 | err = gr_gk20a_alloc_load_netlist_aiv(g, | ||
349 | src, size, | ||
350 | &g->gr.ctx_vars.ctxsw_regs.pm_cau); | ||
351 | if (err) | ||
352 | goto clean_up; | ||
353 | break; | ||
346 | 354 | ||
347 | default: | 355 | default: |
348 | nvgpu_log_info(g, "unrecognized region %d skipped", i); | 356 | nvgpu_log_info(g, "unrecognized region %d skipped", i); |
@@ -395,6 +403,7 @@ clean_up: | |||
395 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); | 403 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); |
396 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); | 404 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); |
397 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.etpc.l); | 405 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.etpc.l); |
406 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_cau.l); | ||
398 | nvgpu_release_firmware(g, netlist_fw); | 407 | nvgpu_release_firmware(g, netlist_fw); |
399 | err = -ENOENT; | 408 | err = -ENOENT; |
400 | } | 409 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h index d8fb8dcd..afc3e9df 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | |||
@@ -105,6 +105,7 @@ union __max_name { | |||
105 | #define NETLIST_REGIONID_CTXREG_PMROP 31 | 105 | #define NETLIST_REGIONID_CTXREG_PMROP 31 |
106 | #define NETLIST_REGIONID_CTXREG_PMUCGPC 32 | 106 | #define NETLIST_REGIONID_CTXREG_PMUCGPC 32 |
107 | #define NETLIST_REGIONID_CTXREG_ETPC 33 | 107 | #define NETLIST_REGIONID_CTXREG_ETPC 33 |
108 | #define NETLIST_REGIONID_NVPERF_PMCAU 35 | ||
108 | 109 | ||
109 | struct netlist_region { | 110 | struct netlist_region { |
110 | u32 region_id; | 111 | u32 region_id; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 5fd0eb0c..b69618ae 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -3130,6 +3130,7 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr) | |||
3130 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.gpc_router.l); | 3130 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.gpc_router.l); |
3131 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_ltc.l); | 3131 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_ltc.l); |
3132 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_fbpa.l); | 3132 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_fbpa.l); |
3133 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_cau.l); | ||
3133 | 3134 | ||
3134 | nvgpu_vfree(g, gr->ctx_vars.local_golden_image); | 3135 | nvgpu_vfree(g, gr->ctx_vars.local_golden_image); |
3135 | gr->ctx_vars.local_golden_image = NULL; | 3136 | gr->ctx_vars.local_golden_image = NULL; |
@@ -7583,6 +7584,18 @@ static int add_ctxsw_buffer_map_entries_gpcs(struct gk20a *g, | |||
7583 | count, offset, max_cnt, base, ~0)) | 7584 | count, offset, max_cnt, base, ~0)) |
7584 | return -EINVAL; | 7585 | return -EINVAL; |
7585 | 7586 | ||
7587 | /* Counter Aggregation Unit, if available */ | ||
7588 | if (g->gr.ctx_vars.ctxsw_regs.pm_cau.count) { | ||
7589 | base = gpc_base + (gpc_stride * gpc_num) | ||
7590 | + tpc_in_gpc_base; | ||
7591 | if (add_ctxsw_buffer_map_entries_subunits(map, | ||
7592 | &g->gr.ctx_vars.ctxsw_regs.pm_cau, | ||
7593 | count, offset, max_cnt, base, num_tpcs, | ||
7594 | tpc_in_gpc_stride, | ||
7595 | (tpc_in_gpc_stride - 1))) | ||
7596 | return -EINVAL; | ||
7597 | } | ||
7598 | |||
7586 | *offset = ALIGN(*offset, 256); | 7599 | *offset = ALIGN(*offset, 256); |
7587 | } | 7600 | } |
7588 | return 0; | 7601 | return 0; |
@@ -7648,6 +7661,8 @@ int gr_gk20a_add_ctxsw_reg_perf_pma(struct ctxsw_buf_offset_map_entry *map, | |||
7648 | *| LIST_pm_ctx_reg_GPC REGn TPC1 | | 7661 | *| LIST_pm_ctx_reg_GPC REGn TPC1 | |
7649 | *| List_pm_ctx_reg_uc_GPC REGn TPCn | | 7662 | *| List_pm_ctx_reg_uc_GPC REGn TPCn | |
7650 | *| LIST_nv_perf_ctx_reg_GPC | | 7663 | *| LIST_nv_perf_ctx_reg_GPC | |
7664 | *| LIST_nv_perf_gpcrouter_ctx_reg | | ||
7665 | *| LIST_nv_perf_ctx_reg_CAU | | ||
7651 | *| ---- |-- | 7666 | *| ---- |-- |
7652 | *| GPC1 . | | 7667 | *| GPC1 . | |
7653 | *| . |<---- | 7668 | *| . |<---- |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 8c21a714..49a69c26 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -319,6 +319,7 @@ struct gr_gk20a { | |||
319 | struct aiv_list_gk20a pm_rop; | 319 | struct aiv_list_gk20a pm_rop; |
320 | struct aiv_list_gk20a pm_ucgpc; | 320 | struct aiv_list_gk20a pm_ucgpc; |
321 | struct aiv_list_gk20a etpc; | 321 | struct aiv_list_gk20a etpc; |
322 | struct aiv_list_gk20a pm_cau; | ||
322 | } ctxsw_regs; | 323 | } ctxsw_regs; |
323 | u32 regs_base_index; | 324 | u32 regs_base_index; |
324 | bool valid; | 325 | bool valid; |