diff options
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | 38 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ltc_gv11b.h | 22 |
2 files changed, 59 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index 85ff33d2..70919f24 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | |||
@@ -20,6 +20,8 @@ | |||
20 | #include "ltc_gv11b.h" | 20 | #include "ltc_gv11b.h" |
21 | 21 | ||
22 | #include <nvgpu/hw/gv11b/hw_ltc_gv11b.h> | 22 | #include <nvgpu/hw/gv11b/hw_ltc_gv11b.h> |
23 | #include <nvgpu/hw/gv11b/hw_top_gv11b.h> | ||
24 | #include <nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h> | ||
23 | 25 | ||
24 | /* | 26 | /* |
25 | * Sets the ZBC stencil for the passed index. | 27 | * Sets the ZBC stencil for the passed index. |
@@ -39,8 +41,44 @@ static void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g, | |||
39 | gk20a_readl(g, ltc_ltcs_ltss_dstg_zbc_index_r()); | 41 | gk20a_readl(g, ltc_ltcs_ltss_dstg_zbc_index_r()); |
40 | } | 42 | } |
41 | 43 | ||
44 | static void gv11b_ltc_init_fs_state(struct gk20a *g) | ||
45 | { | ||
46 | u32 ltc_intr; | ||
47 | u32 reg; | ||
48 | |||
49 | gk20a_dbg_info("initialize gv11b l2"); | ||
50 | |||
51 | g->max_ltc_count = gk20a_readl(g, top_num_ltcs_r()); | ||
52 | g->ltc_count = gk20a_readl(g, pri_ringmaster_enum_ltc_r()); | ||
53 | gk20a_dbg_info("%u ltcs out of %u", g->ltc_count, g->max_ltc_count); | ||
54 | |||
55 | reg = gk20a_readl(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r()); | ||
56 | reg |= ltc_ltcs_ltss_cbc_num_active_ltcs_nvlink_peer_through_l2_f(true) | ||
57 | | ltc_ltcs_ltss_cbc_num_active_ltcs_serialize_f(true); | ||
58 | gk20a_writel(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r(), reg); | ||
59 | |||
60 | gk20a_writel(g, ltc_ltcs_ltss_dstg_cfg0_r(), | ||
61 | gk20a_readl(g, ltc_ltc0_lts0_dstg_cfg0_r()) | | ||
62 | ltc_ltcs_ltss_dstg_cfg0_vdc_4to2_disable_m()); | ||
63 | |||
64 | /* Disable LTC interrupts */ | ||
65 | reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); | ||
66 | reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m(); | ||
67 | reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(); | ||
68 | gk20a_writel(g, ltc_ltcs_ltss_intr_r(), reg); | ||
69 | |||
70 | /* Enable ECC interrupts */ | ||
71 | ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); | ||
72 | ltc_intr |= ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f() | | ||
73 | ltc_ltcs_ltss_intr_en_ecc_ded_error_enabled_f(); | ||
74 | gk20a_writel(g, ltc_ltcs_ltss_intr_r(), | ||
75 | ltc_intr); | ||
76 | } | ||
77 | |||
78 | |||
42 | void gv11b_init_ltc(struct gpu_ops *gops) | 79 | void gv11b_init_ltc(struct gpu_ops *gops) |
43 | { | 80 | { |
44 | gp10b_init_ltc(gops); | 81 | gp10b_init_ltc(gops); |
45 | gops->ltc.set_zbc_s_entry = gv11b_ltc_set_zbc_stencil_entry; | 82 | gops->ltc.set_zbc_s_entry = gv11b_ltc_set_zbc_stencil_entry; |
83 | gops->ltc.init_fs_state = gv11b_ltc_init_fs_state; | ||
46 | } | 84 | } |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ltc_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ltc_gv11b.h index 6968c699..45d3df07 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ltc_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ltc_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -174,6 +174,26 @@ static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_r(void) | |||
174 | { | 174 | { |
175 | return 0x0017e27c; | 175 | return 0x0017e27c; |
176 | } | 176 | } |
177 | static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs__v(u32 r) | ||
178 | { | ||
179 | return (r >> 0) & 0x1f; | ||
180 | } | ||
181 | static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_nvlink_peer_through_l2_f(u32 v) | ||
182 | { | ||
183 | return (v & 0x1) << 24; | ||
184 | } | ||
185 | static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_nvlink_peer_through_l2_v(u32 r) | ||
186 | { | ||
187 | return (r >> 24) & 0x1; | ||
188 | } | ||
189 | static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_serialize_f(u32 v) | ||
190 | { | ||
191 | return (v & 0x1) << 25; | ||
192 | } | ||
193 | static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_serialize_v(u32 r) | ||
194 | { | ||
195 | return (r >> 25) & 0x1; | ||
196 | } | ||
177 | static inline u32 ltc_ltcs_misc_ltc_num_active_ltcs_r(void) | 197 | static inline u32 ltc_ltcs_misc_ltc_num_active_ltcs_r(void) |
178 | { | 198 | { |
179 | return 0x0017e000; | 199 | return 0x0017e000; |