diff options
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 53 |
1 files changed, 30 insertions, 23 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index f0440a4c..a7a58e2f 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -1310,11 +1310,21 @@ bool gv11b_fifo_handle_sched_error(struct gk20a *g) | |||
1310 | return false; | 1310 | return false; |
1311 | } | 1311 | } |
1312 | 1312 | ||
1313 | static u32 gv11b_fifo_ctxsw_timeout_info(struct gk20a *g, u32 active_eng_id) | 1313 | static const char * const invalid_str = "invalid"; |
1314 | |||
1315 | static const char *const ctxsw_timeout_status_desc[] = { | ||
1316 | "awaiting ack", | ||
1317 | "eng was reset", | ||
1318 | "ack received", | ||
1319 | "dropped timeout" | ||
1320 | }; | ||
1321 | |||
1322 | static u32 gv11b_fifo_ctxsw_timeout_info(struct gk20a *g, u32 active_eng_id, | ||
1323 | u32 *info_status) | ||
1314 | { | 1324 | { |
1315 | u32 tsgid = FIFO_INVAL_TSG_ID; | 1325 | u32 tsgid = FIFO_INVAL_TSG_ID; |
1316 | u32 timeout_info; | 1326 | u32 timeout_info; |
1317 | u32 ctx_status, info_status; | 1327 | u32 ctx_status; |
1318 | 1328 | ||
1319 | timeout_info = gk20a_readl(g, | 1329 | timeout_info = gk20a_readl(g, |
1320 | fifo_intr_ctxsw_timeout_info_r(active_eng_id)); | 1330 | fifo_intr_ctxsw_timeout_info_r(active_eng_id)); |
@@ -1374,35 +1384,22 @@ static u32 gv11b_fifo_ctxsw_timeout_info(struct gk20a *g, u32 active_eng_id) | |||
1374 | * DROPPED_TIMEOUT state, as that request may | 1384 | * DROPPED_TIMEOUT state, as that request may |
1375 | * be acked in the interim. | 1385 | * be acked in the interim. |
1376 | */ | 1386 | */ |
1377 | info_status = fifo_intr_ctxsw_timeout_info_status_v(timeout_info); | 1387 | *info_status = fifo_intr_ctxsw_timeout_info_status_v(timeout_info); |
1378 | if (info_status == | 1388 | if (*info_status == |
1379 | fifo_intr_ctxsw_timeout_info_status_awaiting_ack_v()) { | ||
1380 | |||
1381 | gk20a_dbg_info("ctxsw timeout info : awaiting ack"); | ||
1382 | |||
1383 | } else if (info_status == | ||
1384 | fifo_intr_ctxsw_timeout_info_status_eng_was_reset_v()) { | ||
1385 | |||
1386 | gk20a_dbg_info("ctxsw timeout info : eng was reset"); | ||
1387 | |||
1388 | } else if (info_status == | ||
1389 | fifo_intr_ctxsw_timeout_info_status_ack_received_v()) { | 1389 | fifo_intr_ctxsw_timeout_info_status_ack_received_v()) { |
1390 | 1390 | ||
1391 | gk20a_dbg_info("ctxsw timeout info : ack received"); | 1391 | gk20a_dbg_info("ctxsw timeout info : ack received"); |
1392 | /* no need to recover */ | 1392 | /* no need to recover */ |
1393 | tsgid = FIFO_INVAL_TSG_ID; | 1393 | tsgid = FIFO_INVAL_TSG_ID; |
1394 | 1394 | ||
1395 | } else if (info_status == | 1395 | } else if (*info_status == |
1396 | fifo_intr_ctxsw_timeout_info_status_dropped_timeout_v()) { | 1396 | fifo_intr_ctxsw_timeout_info_status_dropped_timeout_v()) { |
1397 | 1397 | ||
1398 | gk20a_dbg_info("ctxsw timeout info : dropped timeout"); | 1398 | gk20a_dbg_info("ctxsw timeout info : dropped timeout"); |
1399 | /* no need to recover */ | 1399 | /* no need to recover */ |
1400 | tsgid = FIFO_INVAL_TSG_ID; | 1400 | tsgid = FIFO_INVAL_TSG_ID; |
1401 | 1401 | ||
1402 | } else { | ||
1403 | gk20a_dbg_info("ctxsw timeout info status = %u", info_status); | ||
1404 | } | 1402 | } |
1405 | |||
1406 | return tsgid; | 1403 | return tsgid; |
1407 | } | 1404 | } |
1408 | 1405 | ||
@@ -1412,6 +1409,8 @@ bool gv11b_fifo_handle_ctxsw_timeout(struct gk20a *g, u32 fifo_intr) | |||
1412 | u32 tsgid = FIFO_INVAL_TSG_ID; | 1409 | u32 tsgid = FIFO_INVAL_TSG_ID; |
1413 | u32 engine_id, active_eng_id; | 1410 | u32 engine_id, active_eng_id; |
1414 | u32 timeout_val, ctxsw_timeout_engines; | 1411 | u32 timeout_val, ctxsw_timeout_engines; |
1412 | u32 info_status; | ||
1413 | const char *info_status_str; | ||
1415 | 1414 | ||
1416 | 1415 | ||
1417 | if (!(fifo_intr & fifo_intr_0_ctxsw_timeout_pending_f())) | 1416 | if (!(fifo_intr & fifo_intr_0_ctxsw_timeout_pending_f())) |
@@ -1440,7 +1439,8 @@ bool gv11b_fifo_handle_ctxsw_timeout(struct gk20a *g, u32 fifo_intr) | |||
1440 | u32 ms = 0; | 1439 | u32 ms = 0; |
1441 | bool verbose = false; | 1440 | bool verbose = false; |
1442 | 1441 | ||
1443 | tsgid = gv11b_fifo_ctxsw_timeout_info(g, active_eng_id); | 1442 | tsgid = gv11b_fifo_ctxsw_timeout_info(g, active_eng_id, |
1443 | &info_status); | ||
1444 | 1444 | ||
1445 | if (tsgid == FIFO_INVAL_TSG_ID) | 1445 | if (tsgid == FIFO_INVAL_TSG_ID) |
1446 | continue; | 1446 | continue; |
@@ -1448,10 +1448,17 @@ bool gv11b_fifo_handle_ctxsw_timeout(struct gk20a *g, u32 fifo_intr) | |||
1448 | if (gk20a_fifo_check_tsg_ctxsw_timeout( | 1448 | if (gk20a_fifo_check_tsg_ctxsw_timeout( |
1449 | &f->tsg[tsgid], &verbose, &ms)) { | 1449 | &f->tsg[tsgid], &verbose, &ms)) { |
1450 | ret = true; | 1450 | ret = true; |
1451 | nvgpu_err(g, | 1451 | |
1452 | "ctxsw timeout error:" | 1452 | info_status_str = invalid_str; |
1453 | "active engine id =%u, %s=%d, ms=%u", | 1453 | if (info_status < |
1454 | active_eng_id, "tsg", tsgid, ms); | 1454 | ARRAY_SIZE(ctxsw_timeout_status_desc)) |
1455 | info_status_str = | ||
1456 | ctxsw_timeout_status_desc[info_status]; | ||
1457 | |||
1458 | nvgpu_err(g, "ctxsw timeout error: " | ||
1459 | "active engine id =%u, %s=%d, info: %s ms=%u", | ||
1460 | active_eng_id, "tsg", tsgid, info_status_str, | ||
1461 | ms); | ||
1455 | 1462 | ||
1456 | /* Cancel all channels' timeout */ | 1463 | /* Cancel all channels' timeout */ |
1457 | gk20a_channel_timeout_restart_all_channels(g); | 1464 | gk20a_channel_timeout_restart_all_channels(g); |