diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/cde_gk20a.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ltc_common.c | 95 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ltc_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | 6 |
7 files changed, 27 insertions, 105 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c index fb368fda..4a3076b5 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c | |||
@@ -79,7 +79,7 @@ __must_hold(&cde_app->mutex) | |||
79 | /* ..then release mapped memory */ | 79 | /* ..then release mapped memory */ |
80 | gk20a_deinit_cde_img(cde_ctx); | 80 | gk20a_deinit_cde_img(cde_ctx); |
81 | gk20a_gmmu_unmap(vm, cde_ctx->backing_store_vaddr, | 81 | gk20a_gmmu_unmap(vm, cde_ctx->backing_store_vaddr, |
82 | g->gr.compbit_store.size, 1); | 82 | g->gr.compbit_store.mem.size, 1); |
83 | 83 | ||
84 | /* housekeeping on app */ | 84 | /* housekeeping on app */ |
85 | list_del(&cde_ctx->list); | 85 | list_del(&cde_ctx->list); |
@@ -392,7 +392,7 @@ static int gk20a_cde_patch_params(struct gk20a_cde_ctx *cde_ctx) | |||
392 | new_data = cde_ctx->compbit_size; | 392 | new_data = cde_ctx->compbit_size; |
393 | break; | 393 | break; |
394 | case TYPE_PARAM_BACKINGSTORE_SIZE: | 394 | case TYPE_PARAM_BACKINGSTORE_SIZE: |
395 | new_data = g->gr.compbit_store.size; | 395 | new_data = g->gr.compbit_store.mem.size; |
396 | break; | 396 | break; |
397 | case TYPE_PARAM_SOURCE_SMMU_ADDR: | 397 | case TYPE_PARAM_SOURCE_SMMU_ADDR: |
398 | new_data = gk20a_mm_gpuva_to_iova_base(cde_ctx->vm, | 398 | new_data = gk20a_mm_gpuva_to_iova_base(cde_ctx->vm, |
@@ -998,7 +998,7 @@ __releases(&cde_app->mutex) | |||
998 | } | 998 | } |
999 | 999 | ||
1000 | gk20a_dbg(gpu_dbg_cde, "cde: buffer=cbc, size=%zu, gpuva=%llx\n", | 1000 | gk20a_dbg(gpu_dbg_cde, "cde: buffer=cbc, size=%zu, gpuva=%llx\n", |
1001 | g->gr.compbit_store.size, cde_ctx->backing_store_vaddr); | 1001 | g->gr.compbit_store.mem.size, cde_ctx->backing_store_vaddr); |
1002 | gk20a_dbg(gpu_dbg_cde, "cde: buffer=compbits, size=%llu, gpuva=%llx\n", | 1002 | gk20a_dbg(gpu_dbg_cde, "cde: buffer=compbits, size=%llu, gpuva=%llx\n", |
1003 | cde_ctx->compbit_size, cde_ctx->compbit_vaddr); | 1003 | cde_ctx->compbit_size, cde_ctx->compbit_vaddr); |
1004 | 1004 | ||
@@ -1122,8 +1122,8 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) | |||
1122 | } | 1122 | } |
1123 | 1123 | ||
1124 | /* map backing store to gpu virtual space */ | 1124 | /* map backing store to gpu virtual space */ |
1125 | vaddr = gk20a_gmmu_map(ch->vm, &gr->compbit_store.sgt, | 1125 | vaddr = gk20a_gmmu_map(ch->vm, &gr->compbit_store.mem.sgt, |
1126 | g->gr.compbit_store.size, | 1126 | g->gr.compbit_store.mem.size, |
1127 | NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE, | 1127 | NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE, |
1128 | gk20a_mem_flag_read_only); | 1128 | gk20a_mem_flag_read_only); |
1129 | 1129 | ||
@@ -1151,7 +1151,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) | |||
1151 | return 0; | 1151 | return 0; |
1152 | 1152 | ||
1153 | err_init_cde_img: | 1153 | err_init_cde_img: |
1154 | gk20a_gmmu_unmap(ch->vm, vaddr, g->gr.compbit_store.size, 1); | 1154 | gk20a_gmmu_unmap(ch->vm, vaddr, g->gr.compbit_store.mem.size, 1); |
1155 | err_map_backingstore: | 1155 | err_map_backingstore: |
1156 | err_alloc_gpfifo: | 1156 | err_alloc_gpfifo: |
1157 | gk20a_vm_put(ch->vm); | 1157 | gk20a_vm_put(ch->vm); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index e8340216..1e6cca6d 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -2944,8 +2944,6 @@ int gk20a_free_obj_ctx(struct channel_gk20a *c, | |||
2944 | static void gk20a_remove_gr_support(struct gr_gk20a *gr) | 2944 | static void gk20a_remove_gr_support(struct gr_gk20a *gr) |
2945 | { | 2945 | { |
2946 | struct gk20a *g = gr->g; | 2946 | struct gk20a *g = gr->g; |
2947 | struct device *d = dev_from_gk20a(g); | ||
2948 | DEFINE_DMA_ATTRS(attrs); | ||
2949 | 2947 | ||
2950 | gk20a_dbg_fn(""); | 2948 | gk20a_dbg_fn(""); |
2951 | 2949 | ||
@@ -2954,9 +2952,8 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr) | |||
2954 | gk20a_gmmu_free(g, &gr->mmu_wr_mem); | 2952 | gk20a_gmmu_free(g, &gr->mmu_wr_mem); |
2955 | gk20a_gmmu_free(g, &gr->mmu_rd_mem); | 2953 | gk20a_gmmu_free(g, &gr->mmu_rd_mem); |
2956 | 2954 | ||
2957 | dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); | 2955 | gk20a_gmmu_free_attr(g, DMA_ATTR_NO_KERNEL_MAPPING, |
2958 | dma_free_attrs(d, gr->compbit_store.size, gr->compbit_store.pages, | 2956 | &gr->compbit_store.mem); |
2959 | gr->compbit_store.base_iova, &attrs); | ||
2960 | 2957 | ||
2961 | memset(&gr->compbit_store, 0, sizeof(struct compbit_store_desc)); | 2958 | memset(&gr->compbit_store, 0, sizeof(struct compbit_store_desc)); |
2962 | 2959 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c index e230c4cd..f48f8298 100644 --- a/drivers/gpu/nvgpu/gk20a/ltc_common.c +++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c | |||
@@ -77,87 +77,20 @@ static int gk20a_ltc_alloc_phys_cbc(struct gk20a *g, | |||
77 | size_t compbit_backing_size) | 77 | size_t compbit_backing_size) |
78 | { | 78 | { |
79 | struct gr_gk20a *gr = &g->gr; | 79 | struct gr_gk20a *gr = &g->gr; |
80 | int order = order_base_2(compbit_backing_size >> PAGE_SHIFT); | ||
81 | struct page *pages; | ||
82 | struct sg_table *sgt; | ||
83 | int err = 0; | ||
84 | |||
85 | /* allocate pages */ | ||
86 | pages = alloc_pages(GFP_KERNEL, order); | ||
87 | if (!pages) { | ||
88 | gk20a_dbg(gpu_dbg_pte, "alloc_pages failed\n"); | ||
89 | err = -ENOMEM; | ||
90 | goto err_alloc_pages; | ||
91 | } | ||
92 | |||
93 | /* clean up the pages */ | ||
94 | memset(page_address(pages), 0, compbit_backing_size); | ||
95 | 80 | ||
96 | /* allocate room for placing the pages pointer.. */ | 81 | return gk20a_gmmu_alloc_attr(g, DMA_ATTR_FORCE_CONTIGUOUS, |
97 | gr->compbit_store.pages = | 82 | compbit_backing_size, |
98 | kzalloc(sizeof(*gr->compbit_store.pages), GFP_KERNEL); | 83 | &gr->compbit_store.mem); |
99 | if (!gr->compbit_store.pages) { | ||
100 | gk20a_dbg(gpu_dbg_pte, "failed to allocate pages struct"); | ||
101 | err = -ENOMEM; | ||
102 | goto err_alloc_compbit_store; | ||
103 | } | ||
104 | |||
105 | err = gk20a_get_sgtable_from_pages(&g->dev->dev, &sgt, &pages, 0, | ||
106 | compbit_backing_size); | ||
107 | if (err) { | ||
108 | gk20a_dbg(gpu_dbg_pte, "could not get sg table for pages\n"); | ||
109 | goto err_alloc_sg_table; | ||
110 | } | ||
111 | |||
112 | /* store the parameters to gr structure */ | ||
113 | *gr->compbit_store.pages = pages; | ||
114 | gr->compbit_store.base_iova = sg_phys(sgt->sgl); | ||
115 | gr->compbit_store.size = compbit_backing_size; | ||
116 | gr->compbit_store.sgt = sgt; | ||
117 | |||
118 | return 0; | ||
119 | |||
120 | err_alloc_sg_table: | ||
121 | kfree(gr->compbit_store.pages); | ||
122 | gr->compbit_store.pages = NULL; | ||
123 | err_alloc_compbit_store: | ||
124 | __free_pages(pages, order); | ||
125 | err_alloc_pages: | ||
126 | return err; | ||
127 | } | 84 | } |
128 | 85 | ||
129 | static int gk20a_ltc_alloc_virt_cbc(struct gk20a *g, | 86 | static int gk20a_ltc_alloc_virt_cbc(struct gk20a *g, |
130 | size_t compbit_backing_size) | 87 | size_t compbit_backing_size) |
131 | { | 88 | { |
132 | struct device *d = dev_from_gk20a(g); | ||
133 | struct gr_gk20a *gr = &g->gr; | 89 | struct gr_gk20a *gr = &g->gr; |
134 | DEFINE_DMA_ATTRS(attrs); | ||
135 | dma_addr_t iova; | ||
136 | int err; | ||
137 | |||
138 | dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); | ||
139 | |||
140 | gr->compbit_store.pages = | ||
141 | dma_alloc_attrs(d, compbit_backing_size, &iova, | ||
142 | GFP_KERNEL, &attrs); | ||
143 | if (!gr->compbit_store.pages) { | ||
144 | gk20a_err(dev_from_gk20a(g), "failed to allocate backing store for compbit : size %zu", | ||
145 | compbit_backing_size); | ||
146 | return -ENOMEM; | ||
147 | } | ||
148 | |||
149 | gr->compbit_store.base_iova = iova; | ||
150 | gr->compbit_store.size = compbit_backing_size; | ||
151 | err = gk20a_get_sgtable_from_pages(d, | ||
152 | &gr->compbit_store.sgt, | ||
153 | gr->compbit_store.pages, iova, | ||
154 | compbit_backing_size); | ||
155 | if (err) { | ||
156 | gk20a_err(dev_from_gk20a(g), "failed to allocate sgt for backing store"); | ||
157 | return err; | ||
158 | } | ||
159 | 90 | ||
160 | return 0; | 91 | return gk20a_gmmu_alloc_attr(g, DMA_ATTR_NO_KERNEL_MAPPING, |
92 | compbit_backing_size, | ||
93 | &gr->compbit_store.mem); | ||
161 | } | 94 | } |
162 | 95 | ||
163 | static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) | 96 | static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) |
@@ -167,16 +100,16 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) | |||
167 | 100 | ||
168 | u32 compbit_base_post_divide; | 101 | u32 compbit_base_post_divide; |
169 | u64 compbit_base_post_multiply64; | 102 | u64 compbit_base_post_multiply64; |
170 | u64 compbit_store_base_iova; | 103 | u64 compbit_store_iova; |
171 | u64 compbit_base_post_divide64; | 104 | u64 compbit_base_post_divide64; |
172 | 105 | ||
173 | if (tegra_platform_is_linsim()) | 106 | if (tegra_platform_is_linsim()) |
174 | compbit_store_base_iova = gr->compbit_store.base_iova; | 107 | compbit_store_iova = gk20a_mem_phys(&gr->compbit_store.mem); |
175 | else | 108 | else |
176 | compbit_store_base_iova = gk20a_mm_smmu_vaddr_translate(g, | 109 | compbit_store_iova = gk20a_mm_iova_addr(g, |
177 | gr->compbit_store.base_iova); | 110 | gr->compbit_store.mem.sgt->sgl); |
178 | 111 | ||
179 | compbit_base_post_divide64 = compbit_store_base_iova >> | 112 | compbit_base_post_divide64 = compbit_store_iova >> |
180 | ltc_ltcs_ltss_cbc_base_alignment_shift_v(); | 113 | ltc_ltcs_ltss_cbc_base_alignment_shift_v(); |
181 | 114 | ||
182 | do_div(compbit_base_post_divide64, g->ltc_count); | 115 | do_div(compbit_base_post_divide64, g->ltc_count); |
@@ -185,7 +118,7 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) | |||
185 | compbit_base_post_multiply64 = ((u64)compbit_base_post_divide * | 118 | compbit_base_post_multiply64 = ((u64)compbit_base_post_divide * |
186 | g->ltc_count) << ltc_ltcs_ltss_cbc_base_alignment_shift_v(); | 119 | g->ltc_count) << ltc_ltcs_ltss_cbc_base_alignment_shift_v(); |
187 | 120 | ||
188 | if (compbit_base_post_multiply64 < compbit_store_base_iova) | 121 | if (compbit_base_post_multiply64 < compbit_store_iova) |
189 | compbit_base_post_divide++; | 122 | compbit_base_post_divide++; |
190 | 123 | ||
191 | /* Bug 1477079 indicates sw adjustment on the posted divided base. */ | 124 | /* Bug 1477079 indicates sw adjustment on the posted divided base. */ |
@@ -198,8 +131,8 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) | |||
198 | 131 | ||
199 | gk20a_dbg(gpu_dbg_info | gpu_dbg_map | gpu_dbg_pte, | 132 | gk20a_dbg(gpu_dbg_info | gpu_dbg_map | gpu_dbg_pte, |
200 | "compbit base.pa: 0x%x,%08x cbc_base:0x%08x\n", | 133 | "compbit base.pa: 0x%x,%08x cbc_base:0x%08x\n", |
201 | (u32)(compbit_store_base_iova >> 32), | 134 | (u32)(compbit_store_iova >> 32), |
202 | (u32)(compbit_store_base_iova & 0xffffffff), | 135 | (u32)(compbit_store_iova & 0xffffffff), |
203 | compbit_base_post_divide); | 136 | compbit_base_post_divide); |
204 | 137 | ||
205 | gr->compbit_store.base_hw = compbit_base_post_divide; | 138 | gr->compbit_store.base_hw = compbit_base_post_divide; |
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c index 1a780212..c5d0f0c4 100644 --- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c | |||
@@ -51,10 +51,8 @@ static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | |||
51 | 51 | ||
52 | gk20a_dbg_fn(""); | 52 | gk20a_dbg_fn(""); |
53 | 53 | ||
54 | if (max_comptag_lines == 0) { | 54 | if (max_comptag_lines == 0) |
55 | gr->compbit_store.size = 0; | ||
56 | return 0; | 55 | return 0; |
57 | } | ||
58 | 56 | ||
59 | if (max_comptag_lines > hw_max_comptag_lines) | 57 | if (max_comptag_lines > hw_max_comptag_lines) |
60 | max_comptag_lines = hw_max_comptag_lines; | 58 | max_comptag_lines = hw_max_comptag_lines; |
@@ -117,7 +115,7 @@ static int gk20a_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op, | |||
117 | 115 | ||
118 | trace_gk20a_ltc_cbc_ctrl_start(g->dev->name, op, min, max); | 116 | trace_gk20a_ltc_cbc_ctrl_start(g->dev->name, op, min, max); |
119 | 117 | ||
120 | if (gr->compbit_store.size == 0) | 118 | if (gr->compbit_store.mem.size == 0) |
121 | return 0; | 119 | return 0; |
122 | 120 | ||
123 | mutex_lock(&g->mm.l2_op_lock); | 121 | mutex_lock(&g->mm.l2_op_lock); |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 036f1472..a01836eb 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -1560,7 +1560,6 @@ int gk20a_gmmu_alloc_attr(struct gk20a *g, enum dma_attr attr, size_t size, stru | |||
1560 | goto fail_free; | 1560 | goto fail_free; |
1561 | 1561 | ||
1562 | mem->size = size; | 1562 | mem->size = size; |
1563 | memset(mem->cpu_va, 0, size); | ||
1564 | 1563 | ||
1565 | gk20a_dbg_fn("done"); | 1564 | gk20a_dbg_fn("done"); |
1566 | 1565 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 56e3a356..ea3a2052 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -113,10 +113,7 @@ struct gr_ctx_desc { | |||
113 | #define NVGPU_GR_PREEMPTION_MODE_CTA 2 | 113 | #define NVGPU_GR_PREEMPTION_MODE_CTA 2 |
114 | 114 | ||
115 | struct compbit_store_desc { | 115 | struct compbit_store_desc { |
116 | struct page **pages; | 116 | struct mem_desc mem; |
117 | struct sg_table *sgt; | ||
118 | size_t size; | ||
119 | u64 base_iova; | ||
120 | 117 | ||
121 | /* The value that is written to the hardware. This depends on | 118 | /* The value that is written to the hardware. This depends on |
122 | * on the number of ltcs and is not an address. */ | 119 | * on the number of ltcs and is not an address. */ |
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c index 522cd1dc..9090be23 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | |||
@@ -53,10 +53,8 @@ static int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | |||
53 | 53 | ||
54 | gk20a_dbg_fn(""); | 54 | gk20a_dbg_fn(""); |
55 | 55 | ||
56 | if (max_comptag_lines == 0) { | 56 | if (max_comptag_lines == 0) |
57 | gr->compbit_store.size = 0; | ||
58 | return 0; | 57 | return 0; |
59 | } | ||
60 | 58 | ||
61 | if (max_comptag_lines > hw_max_comptag_lines) | 59 | if (max_comptag_lines > hw_max_comptag_lines) |
62 | max_comptag_lines = hw_max_comptag_lines; | 60 | max_comptag_lines = hw_max_comptag_lines; |
@@ -117,7 +115,7 @@ int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op, | |||
117 | 115 | ||
118 | trace_gk20a_ltc_cbc_ctrl_start(g->dev->name, op, min, max); | 116 | trace_gk20a_ltc_cbc_ctrl_start(g->dev->name, op, min, max); |
119 | 117 | ||
120 | if (gr->compbit_store.size == 0) | 118 | if (gr->compbit_store.mem.size == 0) |
121 | return 0; | 119 | return 0; |
122 | 120 | ||
123 | mutex_lock(&g->mm.l2_op_lock); | 121 | mutex_lock(&g->mm.l2_op_lock); |