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-rw-r--r--drivers/gpu/nvgpu/common/mm/gmmu.c5
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c7
3 files changed, 12 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 55fbcd3f..2abe87c9 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -404,8 +404,9 @@ static int __set_pd_level(struct vm_gk20a *vm,
404 * to be the table of PDEs. When the next level is PTEs the 404 * to be the table of PDEs. When the next level is PTEs the
405 * target addr is the real physical address we are aiming for. 405 * target addr is the real physical address we are aiming for.
406 */ 406 */
407 target_addr = next_pd ? nvgpu_pde_phys_addr(g, next_pd) : 407 target_addr = next_pd ?
408 phys_addr; 408 nvgpu_pde_phys_addr(g, next_pd) :
409 g->ops.mm.gpu_phys_addr(g, attrs, phys_addr);
409 410
410 l->update_entry(vm, l, 411 l->update_entry(vm, l,
411 pd, pd_idx, 412 pd, pd_idx,
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index e30a89fe..f365ac94 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -713,6 +713,8 @@ struct gpu_ops {
713 (*get_mmu_levels)(struct gk20a *g, u32 big_page_size); 713 (*get_mmu_levels)(struct gk20a *g, u32 big_page_size);
714 void (*init_pdb)(struct gk20a *g, struct nvgpu_mem *inst_block, 714 void (*init_pdb)(struct gk20a *g, struct nvgpu_mem *inst_block,
715 struct vm_gk20a *vm); 715 struct vm_gk20a *vm);
716 u64 (*gpu_phys_addr)(struct gk20a *g,
717 struct nvgpu_gmmu_attrs *attrs, u64 phys);
716 u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl, 718 u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
717 u32 flags); 719 u32 flags);
718 size_t (*get_vidmem_size)(struct gk20a *g); 720 size_t (*get_vidmem_size)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index bdb3b827..d436e985 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -60,6 +60,12 @@ static bool gm20b_mm_is_bar1_supported(struct gk20a *g)
60 return true; 60 return true;
61} 61}
62 62
63u64 gm20b_gpu_phys_addr(struct gk20a *g,
64 struct nvgpu_gmmu_attrs *attrs, u64 phys)
65{
66 return phys;
67}
68
63void gm20b_init_mm(struct gpu_ops *gops) 69void gm20b_init_mm(struct gpu_ops *gops)
64{ 70{
65 gops->mm.support_sparse = gm20b_mm_support_sparse; 71 gops->mm.support_sparse = gm20b_mm_support_sparse;
@@ -73,6 +79,7 @@ void gm20b_init_mm(struct gpu_ops *gops)
73 gops->mm.set_big_page_size = gm20b_mm_set_big_page_size; 79 gops->mm.set_big_page_size = gm20b_mm_set_big_page_size;
74 gops->mm.get_big_page_sizes = gm20b_mm_get_big_page_sizes; 80 gops->mm.get_big_page_sizes = gm20b_mm_get_big_page_sizes;
75 gops->mm.get_default_big_page_size = gm20b_mm_get_default_big_page_size; 81 gops->mm.get_default_big_page_size = gm20b_mm_get_default_big_page_size;
82 gops->mm.gpu_phys_addr = gm20b_gpu_phys_addr;
76 gops->mm.get_iova_addr = gk20a_mm_iova_addr; 83 gops->mm.get_iova_addr = gk20a_mm_iova_addr;
77 gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits; 84 gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits;
78 gops->mm.get_mmu_levels = gk20a_mm_get_mmu_levels; 85 gops->mm.get_mmu_levels = gk20a_mm_get_mmu_levels;