diff options
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fb_gv11b.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c index 0ec6c9dd..6626344c 100644 --- a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c | |||
@@ -1075,14 +1075,17 @@ static void gv11b_fb_handle_mmu_nonreplay_replay_fault(struct gk20a *g, | |||
1075 | struct nvgpu_mem *mem; | 1075 | struct nvgpu_mem *mem; |
1076 | struct mmu_fault_info *mmfault; | 1076 | struct mmu_fault_info *mmfault; |
1077 | u32 invalidate_replay_val = 0; | 1077 | u32 invalidate_replay_val = 0; |
1078 | u64 prev_fault_addr = 0; | 1078 | u64 prev_fault_addr = 0ULL; |
1079 | u64 next_fault_addr = 0; | 1079 | u64 next_fault_addr = 0ULL; |
1080 | 1080 | ||
1081 | if (gv11b_fb_is_fault_buffer_empty(g, index, &get_indx)) { | 1081 | if (gv11b_fb_is_fault_buffer_empty(g, index, &get_indx)) { |
1082 | nvgpu_log(g, gpu_dbg_intr, | 1082 | nvgpu_log(g, gpu_dbg_intr, |
1083 | "SPURIOUS mmu fault: reg index:%d", index); | 1083 | "SPURIOUS mmu fault: reg index:%d", index); |
1084 | return; | 1084 | return; |
1085 | } | 1085 | } |
1086 | nvgpu_info(g, "%s MMU FAULT" , | ||
1087 | index == REPLAY_REG_INDEX ? "REPLAY" : "NON-REPLAY"); | ||
1088 | |||
1086 | nvgpu_log(g, gpu_dbg_intr, "get ptr = %d", get_indx); | 1089 | nvgpu_log(g, gpu_dbg_intr, "get ptr = %d", get_indx); |
1087 | 1090 | ||
1088 | mem = &g->mm.hw_fault_buf[index]; | 1091 | mem = &g->mm.hw_fault_buf[index]; |
@@ -1119,10 +1122,16 @@ static void gv11b_fb_handle_mmu_nonreplay_replay_fault(struct gk20a *g, | |||
1119 | rd32_val = nvgpu_mem_rd32(g, mem, | 1122 | rd32_val = nvgpu_mem_rd32(g, mem, |
1120 | offset + gmmu_fault_buf_entry_valid_w()); | 1123 | offset + gmmu_fault_buf_entry_valid_w()); |
1121 | 1124 | ||
1122 | if (index == REPLAY_REG_INDEX) { | 1125 | if (index == REPLAY_REG_INDEX && mmfault->fault_addr != 0ULL) { |
1126 | /* fault_addr "0" is not supposed to be fixed ever. | ||
1127 | * For the first time when prev = 0, next = 0 and | ||
1128 | * fault addr is also 0 then handle_mmu_fault_common will | ||
1129 | * not be called. Fix by checking fault_addr not equal to 0 | ||
1130 | */ | ||
1123 | prev_fault_addr = next_fault_addr; | 1131 | prev_fault_addr = next_fault_addr; |
1124 | next_fault_addr = mmfault->fault_addr; | 1132 | next_fault_addr = mmfault->fault_addr; |
1125 | if (prev_fault_addr == next_fault_addr) { | 1133 | if (prev_fault_addr == next_fault_addr) { |
1134 | nvgpu_log(g, gpu_dbg_intr, "pte is fixed"); | ||
1126 | if (mmfault->refch) | 1135 | if (mmfault->refch) |
1127 | gk20a_channel_put(mmfault->refch); | 1136 | gk20a_channel_put(mmfault->refch); |
1128 | /* pte already fixed for this addr */ | 1137 | /* pte already fixed for this addr */ |