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-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h2
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.c22
2 files changed, 22 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
index ba7d2ba2..f34fc5e7 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
@@ -455,6 +455,7 @@ struct tegra_vgpu_engines_info {
455 455
456#define TEGRA_VGPU_MAX_GPC_COUNT 16 456#define TEGRA_VGPU_MAX_GPC_COUNT 16
457#define TEGRA_VGPU_MAX_TPC_COUNT_PER_GPC 16 457#define TEGRA_VGPU_MAX_TPC_COUNT_PER_GPC 16
458#define TEGRA_VGPU_L2_EN_MASK 32
458 459
459struct tegra_vgpu_constants_params { 460struct tegra_vgpu_constants_params {
460 u32 arch; 461 u32 arch;
@@ -494,6 +495,7 @@ struct tegra_vgpu_constants_params {
494 u32 num_pce; 495 u32 num_pce;
495 u32 sm_per_tpc; 496 u32 sm_per_tpc;
496 u32 max_subctx_count; 497 u32 max_subctx_count;
498 u32 l2_en_mask[TEGRA_VGPU_L2_EN_MASK];
497}; 499};
498 500
499struct tegra_vgpu_channel_cyclestats_snapshot_params { 501struct tegra_vgpu_channel_cyclestats_snapshot_params {
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index a6cb3828..2f1280ac 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -746,8 +746,23 @@ u32 vgpu_gr_get_max_lts_per_ltc(struct gk20a *g)
746 746
747u32 *vgpu_gr_rop_l2_en_mask(struct gk20a *g) 747u32 *vgpu_gr_rop_l2_en_mask(struct gk20a *g)
748{ 748{
749 /* no one use it yet */ 749 struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
750 return NULL; 750 u32 i, max_fbps_count = priv->constants.num_fbps;
751
752 gk20a_dbg_fn("");
753
754 if (g->gr.fbp_rop_l2_en_mask == NULL) {
755 g->gr.fbp_rop_l2_en_mask =
756 nvgpu_kzalloc(g, max_fbps_count * sizeof(u32));
757 if (!g->gr.fbp_rop_l2_en_mask)
758 return NULL;
759 }
760
761 g->gr.max_fbps_count = max_fbps_count;
762 for (i = 0; i < max_fbps_count; i++)
763 g->gr.fbp_rop_l2_en_mask[i] = priv->constants.l2_en_mask[i];
764
765 return g->gr.fbp_rop_l2_en_mask;
751} 766}
752 767
753int vgpu_gr_add_zbc(struct gk20a *g, struct gr_gk20a *gr, 768int vgpu_gr_add_zbc(struct gk20a *g, struct gr_gk20a *gr,
@@ -840,6 +855,9 @@ static void vgpu_remove_gr_support(struct gr_gk20a *gr)
840 855
841 nvgpu_kfree(gr->g, gr->gpc_tpc_count); 856 nvgpu_kfree(gr->g, gr->gpc_tpc_count);
842 gr->gpc_tpc_count = NULL; 857 gr->gpc_tpc_count = NULL;
858
859 nvgpu_kfree(gr->g, gr->fbp_rop_l2_en_mask);
860 gr->fbp_rop_l2_en_mask = NULL;
843} 861}
844 862
845static int vgpu_gr_init_gr_setup_sw(struct gk20a *g) 863static int vgpu_gr_init_gr_setup_sw(struct gk20a *g)