diff options
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_arb.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/therm_gp106.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/perf/perf.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/perf/vfe_var.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/therm/thrmchannel.c | 5 |
5 files changed, 32 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.h b/drivers/gpu/nvgpu/clk/clk_arb.h index 717cca9b..8355dac5 100644 --- a/drivers/gpu/nvgpu/clk/clk_arb.h +++ b/drivers/gpu/nvgpu/clk/clk_arb.h | |||
@@ -61,6 +61,6 @@ int nvgpu_clk_arb_install_event_fd(struct gk20a *g, | |||
61 | int nvgpu_clk_arb_install_request_fd(struct gk20a *g, | 61 | int nvgpu_clk_arb_install_request_fd(struct gk20a *g, |
62 | struct nvgpu_clk_session *session, int *event_fd); | 62 | struct nvgpu_clk_session *session, int *event_fd); |
63 | 63 | ||
64 | void nvgpu_clk_arb_schedule_vftable_update(struct gk20a *g); | 64 | void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g); |
65 | #endif /* _CLK_ARB_H_ */ | 65 | #endif /* _CLK_ARB_H_ */ |
66 | 66 | ||
diff --git a/drivers/gpu/nvgpu/gp106/therm_gp106.c b/drivers/gpu/nvgpu/gp106/therm_gp106.c index 15aff89c..7bdf0b9e 100644 --- a/drivers/gpu/nvgpu/gp106/therm_gp106.c +++ b/drivers/gpu/nvgpu/gp106/therm_gp106.c | |||
@@ -15,6 +15,12 @@ | |||
15 | #include <linux/debugfs.h> | 15 | #include <linux/debugfs.h> |
16 | #include "hw_therm_gp106.h" | 16 | #include "hw_therm_gp106.h" |
17 | 17 | ||
18 | static void gp106_get_internal_sensor_limits(s32 *max_24_8, s32 *min_24_8) | ||
19 | { | ||
20 | *max_24_8 = (0x87 << 8); | ||
21 | *min_24_8 = ((-216) << 8); | ||
22 | } | ||
23 | |||
18 | static int gp106_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8) | 24 | static int gp106_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8) |
19 | { | 25 | { |
20 | int err = 0; | 26 | int err = 0; |
@@ -117,4 +123,6 @@ void gp106_init_therm_ops(struct gpu_ops *gops) { | |||
117 | #endif | 123 | #endif |
118 | gops->therm.elcg_init_idle_filters = gp106_elcg_init_idle_filters; | 124 | gops->therm.elcg_init_idle_filters = gp106_elcg_init_idle_filters; |
119 | gops->therm.get_internal_sensor_curr_temp = gp106_get_internal_sensor_curr_temp; | 125 | gops->therm.get_internal_sensor_curr_temp = gp106_get_internal_sensor_curr_temp; |
126 | gops->therm.get_internal_sensor_limits = | ||
127 | gp106_get_internal_sensor_limits; | ||
120 | } | 128 | } |
diff --git a/drivers/gpu/nvgpu/perf/perf.c b/drivers/gpu/nvgpu/perf/perf.c index 3821a8dc..41ebb315 100644 --- a/drivers/gpu/nvgpu/perf/perf.c +++ b/drivers/gpu/nvgpu/perf/perf.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include "pmuif/gpmuifperf.h" | 16 | #include "pmuif/gpmuifperf.h" |
17 | #include "pmuif/gpmuifperfvfe.h" | 17 | #include "pmuif/gpmuifperfvfe.h" |
18 | #include "gk20a/pmu_gk20a.h" | 18 | #include "gk20a/pmu_gk20a.h" |
19 | #include "clk/clk_arb.h" | ||
19 | 20 | ||
20 | struct perfrpc_pmucmdhandler_params { | 21 | struct perfrpc_pmucmdhandler_params { |
21 | struct nv_pmu_perf_rpc *prpccall; | 22 | struct nv_pmu_perf_rpc *prpccall; |
@@ -41,6 +42,22 @@ static void perfrpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
41 | phandlerparams->success = 1; | 42 | phandlerparams->success = 1; |
42 | } | 43 | } |
43 | 44 | ||
45 | static int pmu_handle_perf_event(struct gk20a *g, void *pmu_msg) | ||
46 | { | ||
47 | struct nv_pmu_perf_msg *msg = (struct nv_pmu_perf_msg *)pmu_msg; | ||
48 | |||
49 | gk20a_dbg_fn(""); | ||
50 | switch (msg->msg_type) { | ||
51 | case NV_PMU_PERF_MSG_ID_VFE_CALLBACK: | ||
52 | nvgpu_clk_arb_schedule_vf_table_update(g); | ||
53 | break; | ||
54 | default: | ||
55 | WARN_ON(1); | ||
56 | break; | ||
57 | } | ||
58 | return 0; | ||
59 | } | ||
60 | |||
44 | u32 perf_pmu_vfe_load(struct gk20a *g) | 61 | u32 perf_pmu_vfe_load(struct gk20a *g) |
45 | { | 62 | { |
46 | struct pmu_cmd cmd; | 63 | struct pmu_cmd cmd; |
@@ -51,6 +68,9 @@ u32 perf_pmu_vfe_load(struct gk20a *g) | |||
51 | struct nv_pmu_perf_rpc rpccall = {0}; | 68 | struct nv_pmu_perf_rpc rpccall = {0}; |
52 | struct perfrpc_pmucmdhandler_params handler = {0}; | 69 | struct perfrpc_pmucmdhandler_params handler = {0}; |
53 | 70 | ||
71 | /*register call back for future VFE updates*/ | ||
72 | g->ops.perf.handle_pmu_perf_event = pmu_handle_perf_event; | ||
73 | |||
54 | rpccall.function = NV_PMU_PERF_RPC_ID_VFE_LOAD; | 74 | rpccall.function = NV_PMU_PERF_RPC_ID_VFE_LOAD; |
55 | rpccall.params.vfe_load.b_load = true; | 75 | rpccall.params.vfe_load.b_load = true; |
56 | cmd.hdr.unit_id = PMU_UNIT_PERF; | 76 | cmd.hdr.unit_id = PMU_UNIT_PERF; |
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.c b/drivers/gpu/nvgpu/perf/vfe_var.c index 90963478..4f8dc83b 100644 --- a/drivers/gpu/nvgpu/perf/vfe_var.c +++ b/drivers/gpu/nvgpu/perf/vfe_var.c | |||
@@ -921,7 +921,7 @@ static u32 devinit_get_vfe_var_table(struct gk20a *g, | |||
921 | 921 | ||
922 | case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_SENSED_TEMP: | 922 | case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_SENSED_TEMP: |
923 | var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP; | 923 | var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP; |
924 | var_data.single_sensed_temp.temp_default = 105; | 924 | var_data.single_sensed_temp.temp_default = 0x9600; |
925 | var_data.single_sensed_temp.therm_channel_index = | 925 | var_data.single_sensed_temp.therm_channel_index = |
926 | (u8)BIOS_GET_FIELD(var.param0, | 926 | (u8)BIOS_GET_FIELD(var.param0, |
927 | VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSTEMP_TH_CH_IDX); | 927 | VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSTEMP_TH_CH_IDX); |
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c index 015e065b..b5a7dfd2 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.c +++ b/drivers/gpu/nvgpu/therm/thrmchannel.c | |||
@@ -74,9 +74,8 @@ static struct boardobj *construct_channel_device(struct gk20a *g, | |||
74 | pchannel = (struct therm_channel *)board_obj_ptr; | 74 | pchannel = (struct therm_channel *)board_obj_ptr; |
75 | pchannel_device = (struct therm_channel_device *)board_obj_ptr; | 75 | pchannel_device = (struct therm_channel_device *)board_obj_ptr; |
76 | 76 | ||
77 | pchannel->temp_min = 0; | 77 | g->ops.therm.get_internal_sensor_limits(&pchannel->temp_max, |
78 | pchannel->temp_max = 0; | 78 | &pchannel->temp_min); |
79 | |||
80 | pchannel->scaling = (1 << 8); | 79 | pchannel->scaling = (1 << 8); |
81 | pchannel->offset = 0; | 80 | pchannel->offset = 0; |
82 | 81 | ||