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-rw-r--r--drivers/gpu/nvgpu/gk20a/as_gk20a.c12
-rw-r--r--drivers/gpu/nvgpu/gk20a/cde_gk20a.c15
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c87
-rw-r--r--drivers/gpu/nvgpu/gk20a/clk_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c44
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c8
-rw-r--r--drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c45
-rw-r--r--drivers/gpu/nvgpu/gk20a/debug_gk20a.c9
-rw-r--r--drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c41
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h4
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c46
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c28
-rw-r--r--drivers/gpu/nvgpu/gk20a/sched_gk20a.c20
-rw-r--r--drivers/gpu/nvgpu/gk20a/tsg_gk20a.c28
-rw-r--r--drivers/gpu/nvgpu/gm20b/clk_gm20b.c8
16 files changed, 205 insertions, 198 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/as_gk20a.c b/drivers/gpu/nvgpu/gk20a/as_gk20a.c
index a3c8c1ec..01c05d00 100644
--- a/drivers/gpu/nvgpu/gk20a/as_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/as_gk20a.c
@@ -59,11 +59,11 @@ int gk20a_as_alloc_share(struct gk20a_as *as,
59 as_share->id = generate_as_share_id(as_share->as); 59 as_share->id = generate_as_share_id(as_share->as);
60 60
61 /* this will set as_share->vm. */ 61 /* this will set as_share->vm. */
62 err = gk20a_busy(g->dev); 62 err = gk20a_busy(g);
63 if (err) 63 if (err)
64 goto failed; 64 goto failed;
65 err = g->ops.mm.vm_alloc_share(as_share, big_page_size, flags); 65 err = g->ops.mm.vm_alloc_share(as_share, big_page_size, flags);
66 gk20a_idle(g->dev); 66 gk20a_idle(g);
67 67
68 if (err) 68 if (err)
69 goto failed; 69 goto failed;
@@ -87,14 +87,14 @@ int gk20a_as_release_share(struct gk20a_as_share *as_share)
87 87
88 gk20a_dbg_fn(""); 88 gk20a_dbg_fn("");
89 89
90 err = gk20a_busy(g->dev); 90 err = gk20a_busy(g);
91 91
92 if (err) 92 if (err)
93 goto release_fail; 93 goto release_fail;
94 94
95 err = gk20a_vm_release_share(as_share); 95 err = gk20a_vm_release_share(as_share);
96 96
97 gk20a_idle(g->dev); 97 gk20a_idle(g);
98 98
99release_fail: 99release_fail:
100 release_as_share_id(as_share->as, as_share->id); 100 release_as_share_id(as_share->as, as_share->id);
@@ -375,7 +375,7 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
375 return -EFAULT; 375 return -EFAULT;
376 } 376 }
377 377
378 err = gk20a_busy(g->dev); 378 err = gk20a_busy(g);
379 if (err) 379 if (err)
380 return err; 380 return err;
381 381
@@ -449,7 +449,7 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
449 break; 449 break;
450 } 450 }
451 451
452 gk20a_idle(g->dev); 452 gk20a_idle(g);
453 453
454 if ((err == 0) && (_IOC_DIR(cmd) & _IOC_READ)) 454 if ((err == 0) && (_IOC_DIR(cmd) & _IOC_READ))
455 if (copy_to_user((void __user *)arg, buf, _IOC_SIZE(cmd))) 455 if (copy_to_user((void __user *)arg, buf, _IOC_SIZE(cmd)))
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
index df15cf51..5b8ee642 100644
--- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
@@ -764,6 +764,7 @@ __releases(&cde_app->mutex)
764 struct gk20a_cde_ctx, ctx_deleter_work); 764 struct gk20a_cde_ctx, ctx_deleter_work);
765 struct gk20a_cde_app *cde_app = &cde_ctx->g->cde_app; 765 struct gk20a_cde_app *cde_app = &cde_ctx->g->cde_app;
766 struct device *dev = cde_ctx->dev; 766 struct device *dev = cde_ctx->dev;
767 struct gk20a *g = cde_ctx->g;
767 int err; 768 int err;
768 769
769 /* someone has just taken it? engine deletion started? */ 770 /* someone has just taken it? engine deletion started? */
@@ -773,7 +774,7 @@ __releases(&cde_app->mutex)
773 gk20a_dbg(gpu_dbg_fn | gpu_dbg_cde_ctx, 774 gk20a_dbg(gpu_dbg_fn | gpu_dbg_cde_ctx,
774 "cde: attempting to delete temporary %p", cde_ctx); 775 "cde: attempting to delete temporary %p", cde_ctx);
775 776
776 err = gk20a_busy(dev); 777 err = gk20a_busy(g);
777 if (err) { 778 if (err) {
778 /* this context would find new use anyway later, so not freeing 779 /* this context would find new use anyway later, so not freeing
779 * here does not leak anything */ 780 * here does not leak anything */
@@ -801,7 +802,7 @@ __releases(&cde_app->mutex)
801 802
802out: 803out:
803 nvgpu_mutex_release(&cde_app->mutex); 804 nvgpu_mutex_release(&cde_app->mutex);
804 gk20a_idle(dev); 805 gk20a_idle(g);
805} 806}
806 807
807static struct gk20a_cde_ctx *gk20a_cde_do_get_context(struct gk20a *g) 808static struct gk20a_cde_ctx *gk20a_cde_do_get_context(struct gk20a *g)
@@ -949,7 +950,7 @@ __releases(&cde_app->mutex)
949 scatterbuffer_byte_offset < compbits_byte_offset) 950 scatterbuffer_byte_offset < compbits_byte_offset)
950 return -EINVAL; 951 return -EINVAL;
951 952
952 err = gk20a_busy(g->dev); 953 err = gk20a_busy(g);
953 if (err) 954 if (err)
954 return err; 955 return err;
955 956
@@ -1106,7 +1107,7 @@ __releases(&cde_app->mutex)
1106 flags = __flags | NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET; 1107 flags = __flags | NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET;
1107 1108
1108 /* gk20a_cde_execute_buffer() will grab a power reference of it's own */ 1109 /* gk20a_cde_execute_buffer() will grab a power reference of it's own */
1109 gk20a_idle(g->dev); 1110 gk20a_idle(g);
1110 1111
1111 /* execute the conversion buffer, combined with init first if it's the 1112 /* execute the conversion buffer, combined with init first if it's the
1112 * first time */ 1113 * first time */
@@ -1131,7 +1132,7 @@ exit_unmap_surface:
1131exit_unmap_vaddr: 1132exit_unmap_vaddr:
1132 gk20a_vm_unmap(cde_ctx->vm, map_vaddr); 1133 gk20a_vm_unmap(cde_ctx->vm, map_vaddr);
1133exit_idle: 1134exit_idle:
1134 gk20a_idle(g->dev); 1135 gk20a_idle(g);
1135 return err; 1136 return err;
1136} 1137}
1137 1138
@@ -1283,7 +1284,7 @@ __releases(&cde_app->mutex)
1283 if (!cde_app->initialised) 1284 if (!cde_app->initialised)
1284 return -ENOSYS; 1285 return -ENOSYS;
1285 1286
1286 err = gk20a_busy(g->dev); 1287 err = gk20a_busy(g);
1287 if (err) 1288 if (err)
1288 return err; 1289 return err;
1289 1290
@@ -1297,7 +1298,7 @@ __releases(&cde_app->mutex)
1297 1298
1298 nvgpu_mutex_release(&cde_app->mutex); 1299 nvgpu_mutex_release(&cde_app->mutex);
1299 1300
1300 gk20a_idle(g->dev); 1301 gk20a_idle(g);
1301 return err; 1302 return err;
1302} 1303}
1303 1304
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 26fbd66e..0249a1c6 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -1230,7 +1230,7 @@ int gk20a_channel_release(struct inode *inode, struct file *filp)
1230 1230
1231 int err; 1231 int err;
1232 1232
1233 err = gk20a_busy(g->dev); 1233 err = gk20a_busy(g);
1234 if (err) { 1234 if (err) {
1235 gk20a_err(dev_from_gk20a(g), "failed to release a channel!"); 1235 gk20a_err(dev_from_gk20a(g), "failed to release a channel!");
1236 goto channel_release; 1236 goto channel_release;
@@ -1239,7 +1239,7 @@ int gk20a_channel_release(struct inode *inode, struct file *filp)
1239 trace_gk20a_channel_release(dev_name(g->dev)); 1239 trace_gk20a_channel_release(dev_name(g->dev));
1240 1240
1241 gk20a_channel_close(ch); 1241 gk20a_channel_close(ch);
1242 gk20a_idle(g->dev); 1242 gk20a_idle(g);
1243 1243
1244channel_release: 1244channel_release:
1245 gk20a_put(g); 1245 gk20a_put(g);
@@ -1395,14 +1395,14 @@ static int __gk20a_channel_open(struct gk20a *g, struct file *filp, s32 runlist_
1395 goto free_ref; 1395 goto free_ref;
1396 } 1396 }
1397 1397
1398 err = gk20a_busy(g->dev); 1398 err = gk20a_busy(g);
1399 if (err) { 1399 if (err) {
1400 gk20a_err(dev_from_gk20a(g), "failed to power on, %d", err); 1400 gk20a_err(dev_from_gk20a(g), "failed to power on, %d", err);
1401 goto fail_busy; 1401 goto fail_busy;
1402 } 1402 }
1403 /* All the user space channel should be non privilege */ 1403 /* All the user space channel should be non privilege */
1404 ch = gk20a_open_new_channel(g, runlist_id, false); 1404 ch = gk20a_open_new_channel(g, runlist_id, false);
1405 gk20a_idle(g->dev); 1405 gk20a_idle(g);
1406 if (!ch) { 1406 if (!ch) {
1407 gk20a_err(dev_from_gk20a(g), 1407 gk20a_err(dev_from_gk20a(g),
1408 "failed to get f"); 1408 "failed to get f");
@@ -2693,7 +2693,7 @@ static void gk20a_channel_clean_up_jobs(struct channel_gk20a *c,
2693 2693
2694 channel_gk20a_free_job(c, job); 2694 channel_gk20a_free_job(c, job);
2695 job_finished = 1; 2695 job_finished = 1;
2696 gk20a_idle(g->dev); 2696 gk20a_idle(g);
2697 2697
2698 if (!clean_all) { 2698 if (!clean_all) {
2699 /* Timeout isn't supported here so don't touch it. */ 2699 /* Timeout isn't supported here so don't touch it. */
@@ -3120,7 +3120,7 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c,
3120 return -EINVAL; 3120 return -EINVAL;
3121 3121
3122 /* released by job cleanup via syncpt or sema interrupt */ 3122 /* released by job cleanup via syncpt or sema interrupt */
3123 err = gk20a_busy(g->dev); 3123 err = gk20a_busy(g);
3124 if (err) { 3124 if (err) {
3125 gk20a_err(d, "failed to host gk20a to submit gpfifo, process %s", 3125 gk20a_err(d, "failed to host gk20a to submit gpfifo, process %s",
3126 current->comm); 3126 current->comm);
@@ -3227,7 +3227,7 @@ clean_up:
3227 gk20a_fence_put(pre_fence); 3227 gk20a_fence_put(pre_fence);
3228 gk20a_fence_put(post_fence); 3228 gk20a_fence_put(post_fence);
3229 if (need_deferred_cleanup) 3229 if (need_deferred_cleanup)
3230 gk20a_idle(g->dev); 3230 gk20a_idle(g);
3231 return err; 3231 return err;
3232} 3232}
3233 3233
@@ -3930,7 +3930,8 @@ long gk20a_channel_ioctl(struct file *filp,
3930{ 3930{
3931 struct channel_priv *priv = filp->private_data; 3931 struct channel_priv *priv = filp->private_data;
3932 struct channel_gk20a *ch = priv->c; 3932 struct channel_gk20a *ch = priv->c;
3933 struct device *dev = ch->g->dev; 3933 struct gk20a *g = ch->g;
3934 struct device *dev = g->dev;
3934 u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0}; 3935 u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0};
3935 int err = 0; 3936 int err = 0;
3936 3937
@@ -3967,7 +3968,7 @@ long gk20a_channel_ioctl(struct file *filp,
3967 case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD: 3968 case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD:
3968 break; 3969 break;
3969 case NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX: 3970 case NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX:
3970 err = gk20a_busy(dev); 3971 err = gk20a_busy(g);
3971 if (err) { 3972 if (err) {
3972 dev_err(dev, 3973 dev_err(dev,
3973 "%s: failed to host gk20a for ioctl cmd: 0x%x", 3974 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -3976,14 +3977,14 @@ long gk20a_channel_ioctl(struct file *filp,
3976 } 3977 }
3977 err = ch->g->ops.gr.alloc_obj_ctx(ch, 3978 err = ch->g->ops.gr.alloc_obj_ctx(ch,
3978 (struct nvgpu_alloc_obj_ctx_args *)buf); 3979 (struct nvgpu_alloc_obj_ctx_args *)buf);
3979 gk20a_idle(dev); 3980 gk20a_idle(g);
3980 break; 3981 break;
3981 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX: 3982 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX:
3982 { 3983 {
3983 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args = 3984 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args =
3984 (struct nvgpu_alloc_gpfifo_ex_args *)buf; 3985 (struct nvgpu_alloc_gpfifo_ex_args *)buf;
3985 3986
3986 err = gk20a_busy(dev); 3987 err = gk20a_busy(g);
3987 if (err) { 3988 if (err) {
3988 dev_err(dev, 3989 dev_err(dev,
3989 "%s: failed to host gk20a for ioctl cmd: 0x%x", 3990 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -3993,11 +3994,11 @@ long gk20a_channel_ioctl(struct file *filp,
3993 3994
3994 if (!is_power_of_2(alloc_gpfifo_ex_args->num_entries)) { 3995 if (!is_power_of_2(alloc_gpfifo_ex_args->num_entries)) {
3995 err = -EINVAL; 3996 err = -EINVAL;
3996 gk20a_idle(dev); 3997 gk20a_idle(g);
3997 break; 3998 break;
3998 } 3999 }
3999 err = gk20a_alloc_channel_gpfifo(ch, alloc_gpfifo_ex_args); 4000 err = gk20a_alloc_channel_gpfifo(ch, alloc_gpfifo_ex_args);
4000 gk20a_idle(dev); 4001 gk20a_idle(g);
4001 break; 4002 break;
4002 } 4003 }
4003 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO: 4004 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO:
@@ -4006,7 +4007,7 @@ long gk20a_channel_ioctl(struct file *filp,
4006 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args = 4007 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args =
4007 (struct nvgpu_alloc_gpfifo_args *)buf; 4008 (struct nvgpu_alloc_gpfifo_args *)buf;
4008 4009
4009 err = gk20a_busy(dev); 4010 err = gk20a_busy(g);
4010 if (err) { 4011 if (err) {
4011 dev_err(dev, 4012 dev_err(dev,
4012 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4013 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4027,7 +4028,7 @@ long gk20a_channel_ioctl(struct file *filp,
4027 alloc_gpfifo_ex_args.flags = alloc_gpfifo_args->flags; 4028 alloc_gpfifo_ex_args.flags = alloc_gpfifo_args->flags;
4028 4029
4029 err = gk20a_alloc_channel_gpfifo(ch, &alloc_gpfifo_ex_args); 4030 err = gk20a_alloc_channel_gpfifo(ch, &alloc_gpfifo_ex_args);
4030 gk20a_idle(dev); 4031 gk20a_idle(g);
4031 break; 4032 break;
4032 } 4033 }
4033 case NVGPU_IOCTL_CHANNEL_SUBMIT_GPFIFO: 4034 case NVGPU_IOCTL_CHANNEL_SUBMIT_GPFIFO:
@@ -4035,7 +4036,7 @@ long gk20a_channel_ioctl(struct file *filp,
4035 (struct nvgpu_submit_gpfifo_args *)buf); 4036 (struct nvgpu_submit_gpfifo_args *)buf);
4036 break; 4037 break;
4037 case NVGPU_IOCTL_CHANNEL_WAIT: 4038 case NVGPU_IOCTL_CHANNEL_WAIT:
4038 err = gk20a_busy(dev); 4039 err = gk20a_busy(g);
4039 if (err) { 4040 if (err) {
4040 dev_err(dev, 4041 dev_err(dev,
4041 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4042 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4052,10 +4053,10 @@ long gk20a_channel_ioctl(struct file *filp,
4052 4053
4053 nvgpu_mutex_acquire(&ch->ioctl_lock); 4054 nvgpu_mutex_acquire(&ch->ioctl_lock);
4054 4055
4055 gk20a_idle(dev); 4056 gk20a_idle(g);
4056 break; 4057 break;
4057 case NVGPU_IOCTL_CHANNEL_ZCULL_BIND: 4058 case NVGPU_IOCTL_CHANNEL_ZCULL_BIND:
4058 err = gk20a_busy(dev); 4059 err = gk20a_busy(g);
4059 if (err) { 4060 if (err) {
4060 dev_err(dev, 4061 dev_err(dev,
4061 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4062 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4064,10 +4065,10 @@ long gk20a_channel_ioctl(struct file *filp,
4064 } 4065 }
4065 err = gk20a_channel_zcull_bind(ch, 4066 err = gk20a_channel_zcull_bind(ch,
4066 (struct nvgpu_zcull_bind_args *)buf); 4067 (struct nvgpu_zcull_bind_args *)buf);
4067 gk20a_idle(dev); 4068 gk20a_idle(g);
4068 break; 4069 break;
4069 case NVGPU_IOCTL_CHANNEL_SET_ERROR_NOTIFIER: 4070 case NVGPU_IOCTL_CHANNEL_SET_ERROR_NOTIFIER:
4070 err = gk20a_busy(dev); 4071 err = gk20a_busy(g);
4071 if (err) { 4072 if (err) {
4072 dev_err(dev, 4073 dev_err(dev,
4073 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4074 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4076,11 +4077,11 @@ long gk20a_channel_ioctl(struct file *filp,
4076 } 4077 }
4077 err = gk20a_init_error_notifier(ch, 4078 err = gk20a_init_error_notifier(ch,
4078 (struct nvgpu_set_error_notifier *)buf); 4079 (struct nvgpu_set_error_notifier *)buf);
4079 gk20a_idle(dev); 4080 gk20a_idle(g);
4080 break; 4081 break;
4081#ifdef CONFIG_GK20A_CYCLE_STATS 4082#ifdef CONFIG_GK20A_CYCLE_STATS
4082 case NVGPU_IOCTL_CHANNEL_CYCLE_STATS: 4083 case NVGPU_IOCTL_CHANNEL_CYCLE_STATS:
4083 err = gk20a_busy(dev); 4084 err = gk20a_busy(g);
4084 if (err) { 4085 if (err) {
4085 dev_err(dev, 4086 dev_err(dev,
4086 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4087 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4089,7 +4090,7 @@ long gk20a_channel_ioctl(struct file *filp,
4089 } 4090 }
4090 err = gk20a_channel_cycle_stats(ch, 4091 err = gk20a_channel_cycle_stats(ch,
4091 (struct nvgpu_cycle_stats_args *)buf); 4092 (struct nvgpu_cycle_stats_args *)buf);
4092 gk20a_idle(dev); 4093 gk20a_idle(g);
4093 break; 4094 break;
4094#endif 4095#endif
4095 case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT: 4096 case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT:
@@ -4123,7 +4124,7 @@ long gk20a_channel_ioctl(struct file *filp,
4123 ch->has_timedout; 4124 ch->has_timedout;
4124 break; 4125 break;
4125 case NVGPU_IOCTL_CHANNEL_SET_PRIORITY: 4126 case NVGPU_IOCTL_CHANNEL_SET_PRIORITY:
4126 err = gk20a_busy(dev); 4127 err = gk20a_busy(g);
4127 if (err) { 4128 if (err) {
4128 dev_err(dev, 4129 dev_err(dev,
4129 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4130 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4133,12 +4134,12 @@ long gk20a_channel_ioctl(struct file *filp,
4133 err = ch->g->ops.fifo.channel_set_priority(ch, 4134 err = ch->g->ops.fifo.channel_set_priority(ch,
4134 ((struct nvgpu_set_priority_args *)buf)->priority); 4135 ((struct nvgpu_set_priority_args *)buf)->priority);
4135 4136
4136 gk20a_idle(dev); 4137 gk20a_idle(g);
4137 gk20a_channel_trace_sched_param( 4138 gk20a_channel_trace_sched_param(
4138 trace_gk20a_channel_set_priority, ch); 4139 trace_gk20a_channel_set_priority, ch);
4139 break; 4140 break;
4140 case NVGPU_IOCTL_CHANNEL_ENABLE: 4141 case NVGPU_IOCTL_CHANNEL_ENABLE:
4141 err = gk20a_busy(dev); 4142 err = gk20a_busy(g);
4142 if (err) { 4143 if (err) {
4143 dev_err(dev, 4144 dev_err(dev,
4144 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4145 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4149,10 +4150,10 @@ long gk20a_channel_ioctl(struct file *filp,
4149 ch->g->ops.fifo.enable_channel(ch); 4150 ch->g->ops.fifo.enable_channel(ch);
4150 else 4151 else
4151 err = -ENOSYS; 4152 err = -ENOSYS;
4152 gk20a_idle(dev); 4153 gk20a_idle(g);
4153 break; 4154 break;
4154 case NVGPU_IOCTL_CHANNEL_DISABLE: 4155 case NVGPU_IOCTL_CHANNEL_DISABLE:
4155 err = gk20a_busy(dev); 4156 err = gk20a_busy(g);
4156 if (err) { 4157 if (err) {
4157 dev_err(dev, 4158 dev_err(dev,
4158 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4159 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4163,10 +4164,10 @@ long gk20a_channel_ioctl(struct file *filp,
4163 ch->g->ops.fifo.disable_channel(ch); 4164 ch->g->ops.fifo.disable_channel(ch);
4164 else 4165 else
4165 err = -ENOSYS; 4166 err = -ENOSYS;
4166 gk20a_idle(dev); 4167 gk20a_idle(g);
4167 break; 4168 break;
4168 case NVGPU_IOCTL_CHANNEL_PREEMPT: 4169 case NVGPU_IOCTL_CHANNEL_PREEMPT:
4169 err = gk20a_busy(dev); 4170 err = gk20a_busy(g);
4170 if (err) { 4171 if (err) {
4171 dev_err(dev, 4172 dev_err(dev,
4172 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4173 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4174,10 +4175,10 @@ long gk20a_channel_ioctl(struct file *filp,
4174 break; 4175 break;
4175 } 4176 }
4176 err = gk20a_fifo_preempt(ch->g, ch); 4177 err = gk20a_fifo_preempt(ch->g, ch);
4177 gk20a_idle(dev); 4178 gk20a_idle(g);
4178 break; 4179 break;
4179 case NVGPU_IOCTL_CHANNEL_FORCE_RESET: 4180 case NVGPU_IOCTL_CHANNEL_FORCE_RESET:
4180 err = gk20a_busy(dev); 4181 err = gk20a_busy(g);
4181 if (err) { 4182 if (err) {
4182 dev_err(dev, 4183 dev_err(dev,
4183 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4184 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4186,7 +4187,7 @@ long gk20a_channel_ioctl(struct file *filp,
4186 } 4187 }
4187 err = ch->g->ops.fifo.force_reset_ch(ch, 4188 err = ch->g->ops.fifo.force_reset_ch(ch,
4188 NVGPU_CHANNEL_RESETCHANNEL_VERIF_ERROR, true); 4189 NVGPU_CHANNEL_RESETCHANNEL_VERIF_ERROR, true);
4189 gk20a_idle(dev); 4190 gk20a_idle(g);
4190 break; 4191 break;
4191 case NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL: 4192 case NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL:
4192 err = gk20a_channel_event_id_ctrl(ch, 4193 err = gk20a_channel_event_id_ctrl(ch,
@@ -4194,7 +4195,7 @@ long gk20a_channel_ioctl(struct file *filp,
4194 break; 4195 break;
4195#ifdef CONFIG_GK20A_CYCLE_STATS 4196#ifdef CONFIG_GK20A_CYCLE_STATS
4196 case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT: 4197 case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT:
4197 err = gk20a_busy(dev); 4198 err = gk20a_busy(g);
4198 if (err) { 4199 if (err) {
4199 dev_err(dev, 4200 dev_err(dev,
4200 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4201 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4203,7 +4204,7 @@ long gk20a_channel_ioctl(struct file *filp,
4203 } 4204 }
4204 err = gk20a_channel_cycle_stats_snapshot(ch, 4205 err = gk20a_channel_cycle_stats_snapshot(ch,
4205 (struct nvgpu_cycle_stats_snapshot_args *)buf); 4206 (struct nvgpu_cycle_stats_snapshot_args *)buf);
4206 gk20a_idle(dev); 4207 gk20a_idle(g);
4207 break; 4208 break;
4208#endif 4209#endif
4209 case NVGPU_IOCTL_CHANNEL_WDT: 4210 case NVGPU_IOCTL_CHANNEL_WDT:
@@ -4211,7 +4212,7 @@ long gk20a_channel_ioctl(struct file *filp,
4211 (struct nvgpu_channel_wdt_args *)buf); 4212 (struct nvgpu_channel_wdt_args *)buf);
4212 break; 4213 break;
4213 case NVGPU_IOCTL_CHANNEL_SET_RUNLIST_INTERLEAVE: 4214 case NVGPU_IOCTL_CHANNEL_SET_RUNLIST_INTERLEAVE:
4214 err = gk20a_busy(dev); 4215 err = gk20a_busy(g);
4215 if (err) { 4216 if (err) {
4216 dev_err(dev, 4217 dev_err(dev,
4217 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4218 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4221,12 +4222,12 @@ long gk20a_channel_ioctl(struct file *filp,
4221 err = gk20a_channel_set_runlist_interleave(ch, 4222 err = gk20a_channel_set_runlist_interleave(ch,
4222 ((struct nvgpu_runlist_interleave_args *)buf)->level); 4223 ((struct nvgpu_runlist_interleave_args *)buf)->level);
4223 4224
4224 gk20a_idle(dev); 4225 gk20a_idle(g);
4225 gk20a_channel_trace_sched_param( 4226 gk20a_channel_trace_sched_param(
4226 trace_gk20a_channel_set_runlist_interleave, ch); 4227 trace_gk20a_channel_set_runlist_interleave, ch);
4227 break; 4228 break;
4228 case NVGPU_IOCTL_CHANNEL_SET_TIMESLICE: 4229 case NVGPU_IOCTL_CHANNEL_SET_TIMESLICE:
4229 err = gk20a_busy(dev); 4230 err = gk20a_busy(g);
4230 if (err) { 4231 if (err) {
4231 dev_err(dev, 4232 dev_err(dev,
4232 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4233 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4236,13 +4237,13 @@ long gk20a_channel_ioctl(struct file *filp,
4236 err = ch->g->ops.fifo.channel_set_timeslice(ch, 4237 err = ch->g->ops.fifo.channel_set_timeslice(ch,
4237 ((struct nvgpu_timeslice_args *)buf)->timeslice_us); 4238 ((struct nvgpu_timeslice_args *)buf)->timeslice_us);
4238 4239
4239 gk20a_idle(dev); 4240 gk20a_idle(g);
4240 gk20a_channel_trace_sched_param( 4241 gk20a_channel_trace_sched_param(
4241 trace_gk20a_channel_set_timeslice, ch); 4242 trace_gk20a_channel_set_timeslice, ch);
4242 break; 4243 break;
4243 case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: 4244 case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE:
4244 if (ch->g->ops.gr.set_preemption_mode) { 4245 if (ch->g->ops.gr.set_preemption_mode) {
4245 err = gk20a_busy(dev); 4246 err = gk20a_busy(g);
4246 if (err) { 4247 if (err) {
4247 dev_err(dev, 4248 dev_err(dev,
4248 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4249 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4252,7 +4253,7 @@ long gk20a_channel_ioctl(struct file *filp,
4252 err = ch->g->ops.gr.set_preemption_mode(ch, 4253 err = ch->g->ops.gr.set_preemption_mode(ch,
4253 ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode, 4254 ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode,
4254 ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode); 4255 ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode);
4255 gk20a_idle(dev); 4256 gk20a_idle(g);
4256 } else { 4257 } else {
4257 err = -EINVAL; 4258 err = -EINVAL;
4258 } 4259 }
@@ -4262,7 +4263,7 @@ long gk20a_channel_ioctl(struct file *filp,
4262 bool boost = 4263 bool boost =
4263 ((struct nvgpu_boosted_ctx_args *)buf)->boost; 4264 ((struct nvgpu_boosted_ctx_args *)buf)->boost;
4264 4265
4265 err = gk20a_busy(dev); 4266 err = gk20a_busy(g);
4266 if (err) { 4267 if (err) {
4267 dev_err(dev, 4268 dev_err(dev,
4268 "%s: failed to host gk20a for ioctl cmd: 0x%x", 4269 "%s: failed to host gk20a for ioctl cmd: 0x%x",
@@ -4270,7 +4271,7 @@ long gk20a_channel_ioctl(struct file *filp,
4270 break; 4271 break;
4271 } 4272 }
4272 err = ch->g->ops.gr.set_boosted_ctx(ch, boost); 4273 err = ch->g->ops.gr.set_boosted_ctx(ch, boost);
4273 gk20a_idle(dev); 4274 gk20a_idle(g);
4274 } else { 4275 } else {
4275 err = -EINVAL; 4276 err = -EINVAL;
4276 } 4277 }
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
index 38d13b4b..24bb8eda 100644
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
@@ -759,7 +759,7 @@ static int monitor_get(void *data, u64 *val)
759 u64 freq = clk->gpc_pll.clk_in; 759 u64 freq = clk->gpc_pll.clk_in;
760 u32 count1, count2; 760 u32 count1, count2;
761 761
762 err = gk20a_busy(g->dev); 762 err = gk20a_busy(g);
763 if (err) 763 if (err)
764 return err; 764 return err;
765 765
@@ -783,7 +783,7 @@ static int monitor_get(void *data, u64 *val)
783 do_div(freq, ncycle); 783 do_div(freq, ncycle);
784 *val = freq; 784 *val = freq;
785 785
786 gk20a_idle(g->dev); 786 gk20a_idle(g);
787 787
788 if (count1 != count2) 788 if (count1 != count2)
789 return -EBUSY; 789 return -EBUSY;
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 67971369..c87226c8 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -74,10 +74,10 @@ int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
74 priv->g = g; 74 priv->g = g;
75 75
76 if (!g->gr.sw_ready) { 76 if (!g->gr.sw_ready) {
77 err = gk20a_busy(g->dev); 77 err = gk20a_busy(g);
78 if (err) 78 if (err)
79 goto free_ref; 79 goto free_ref;
80 gk20a_idle(g->dev); 80 gk20a_idle(g);
81 } 81 }
82 82
83#ifdef CONFIG_ARCH_TEGRA_18x_SOC 83#ifdef CONFIG_ARCH_TEGRA_18x_SOC
@@ -393,7 +393,7 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode(
393 struct gk20a *g, 393 struct gk20a *g,
394 struct nvgpu_gpu_mmu_debug_mode_args *args) 394 struct nvgpu_gpu_mmu_debug_mode_args *args)
395{ 395{
396 if (gk20a_busy(g->dev)) { 396 if (gk20a_busy(g)) {
397 gk20a_err(dev_from_gk20a(g), "failed to power on gpu\n"); 397 gk20a_err(dev_from_gk20a(g), "failed to power on gpu\n");
398 return -EINVAL; 398 return -EINVAL;
399 } 399 }
@@ -402,7 +402,7 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode(
402 g->ops.fb.set_debug_mode(g, args->state == 1); 402 g->ops.fb.set_debug_mode(g, args->state == 1);
403 nvgpu_mutex_release(&g->dbg_sessions_lock); 403 nvgpu_mutex_release(&g->dbg_sessions_lock);
404 404
405 gk20a_idle(g->dev); 405 gk20a_idle(g);
406 return 0; 406 return 0;
407} 407}
408 408
@@ -653,7 +653,7 @@ static inline int get_timestamps_zipper(struct gk20a *g,
653 u32 gpu_timestamp_hi_new = 0; 653 u32 gpu_timestamp_hi_new = 0;
654 u32 gpu_timestamp_hi_old = 0; 654 u32 gpu_timestamp_hi_old = 0;
655 655
656 if (gk20a_busy(g->dev)) { 656 if (gk20a_busy(g)) {
657 gk20a_err(dev_from_gk20a(g), "GPU not powered on\n"); 657 gk20a_err(dev_from_gk20a(g), "GPU not powered on\n");
658 err = -EINVAL; 658 err = -EINVAL;
659 goto end; 659 goto end;
@@ -681,7 +681,7 @@ static inline int get_timestamps_zipper(struct gk20a *g,
681 } 681 }
682 682
683end: 683end:
684 gk20a_idle(g->dev); 684 gk20a_idle(g);
685 return err; 685 return err;
686} 686}
687 687
@@ -721,7 +721,7 @@ static int nvgpu_gpu_get_gpu_time(
721 u64 time; 721 u64 time;
722 int err; 722 int err;
723 723
724 err = gk20a_busy(g->dev); 724 err = gk20a_busy(g);
725 if (err) 725 if (err)
726 return err; 726 return err;
727 727
@@ -729,7 +729,7 @@ static int nvgpu_gpu_get_gpu_time(
729 if (!err) 729 if (!err)
730 args->gpu_timestamp = time; 730 args->gpu_timestamp = time;
731 731
732 gk20a_idle(g->dev); 732 gk20a_idle(g);
733 return err; 733 return err;
734} 734}
735 735
@@ -1218,7 +1218,7 @@ static int nvgpu_gpu_get_voltage(struct gk20a *g,
1218 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_VOLTAGE)) 1218 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_VOLTAGE))
1219 return -EINVAL; 1219 return -EINVAL;
1220 1220
1221 err = gk20a_busy(g->dev); 1221 err = gk20a_busy(g);
1222 if (err) 1222 if (err)
1223 return err; 1223 return err;
1224 1224
@@ -1236,7 +1236,7 @@ static int nvgpu_gpu_get_voltage(struct gk20a *g,
1236 err = -EINVAL; 1236 err = -EINVAL;
1237 } 1237 }
1238 1238
1239 gk20a_idle(g->dev); 1239 gk20a_idle(g);
1240 1240
1241 return err; 1241 return err;
1242} 1242}
@@ -1254,13 +1254,13 @@ static int nvgpu_gpu_get_current(struct gk20a *g,
1254 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_CURRENT)) 1254 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_CURRENT))
1255 return -EINVAL; 1255 return -EINVAL;
1256 1256
1257 err = gk20a_busy(g->dev); 1257 err = gk20a_busy(g);
1258 if (err) 1258 if (err)
1259 return err; 1259 return err;
1260 1260
1261 err = pmgr_pwr_devices_get_current(g, &args->currnt); 1261 err = pmgr_pwr_devices_get_current(g, &args->currnt);
1262 1262
1263 gk20a_idle(g->dev); 1263 gk20a_idle(g);
1264 1264
1265 return err; 1265 return err;
1266} 1266}
@@ -1278,13 +1278,13 @@ static int nvgpu_gpu_get_power(struct gk20a *g,
1278 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_POWER)) 1278 if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_SUPPORT_GET_POWER))
1279 return -EINVAL; 1279 return -EINVAL;
1280 1280
1281 err = gk20a_busy(g->dev); 1281 err = gk20a_busy(g);
1282 if (err) 1282 if (err)
1283 return err; 1283 return err;
1284 1284
1285 err = pmgr_pwr_devices_get_power(g, &args->power); 1285 err = pmgr_pwr_devices_get_power(g, &args->power);
1286 1286
1287 gk20a_idle(g->dev); 1287 gk20a_idle(g);
1288 1288
1289 return err; 1289 return err;
1290} 1290}
@@ -1303,13 +1303,13 @@ static int nvgpu_gpu_get_temperature(struct gk20a *g,
1303 if (!g->ops.therm.get_internal_sensor_curr_temp) 1303 if (!g->ops.therm.get_internal_sensor_curr_temp)
1304 return -EINVAL; 1304 return -EINVAL;
1305 1305
1306 err = gk20a_busy(g->dev); 1306 err = gk20a_busy(g);
1307 if (err) 1307 if (err)
1308 return err; 1308 return err;
1309 1309
1310 err = g->ops.therm.get_internal_sensor_curr_temp(g, &temp_f24_8); 1310 err = g->ops.therm.get_internal_sensor_curr_temp(g, &temp_f24_8);
1311 1311
1312 gk20a_idle(g->dev); 1312 gk20a_idle(g);
1313 1313
1314 args->temp_f24_8 = (s32)temp_f24_8; 1314 args->temp_f24_8 = (s32)temp_f24_8;
1315 1315
@@ -1330,13 +1330,13 @@ static int nvgpu_gpu_set_therm_alert_limit(struct gk20a *g,
1330 if (!g->ops.therm.configure_therm_alert) 1330 if (!g->ops.therm.configure_therm_alert)
1331 return -EINVAL; 1331 return -EINVAL;
1332 1332
1333 err = gk20a_busy(g->dev); 1333 err = gk20a_busy(g);
1334 if (err) 1334 if (err)
1335 return err; 1335 return err;
1336 1336
1337 err = g->ops.therm.configure_therm_alert(g, args->temp_f24_8); 1337 err = g->ops.therm.configure_therm_alert(g, args->temp_f24_8);
1338 1338
1339 gk20a_idle(g->dev); 1339 gk20a_idle(g);
1340 1340
1341 return err; 1341 return err;
1342} 1342}
@@ -1371,11 +1371,11 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
1371 } 1371 }
1372 1372
1373 if (!g->gr.sw_ready) { 1373 if (!g->gr.sw_ready) {
1374 err = gk20a_busy(g->dev); 1374 err = gk20a_busy(g);
1375 if (err) 1375 if (err)
1376 return err; 1376 return err;
1377 1377
1378 gk20a_idle(g->dev); 1378 gk20a_idle(g);
1379 } 1379 }
1380 1380
1381 switch (cmd) { 1381 switch (cmd) {
@@ -1439,11 +1439,11 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
1439 } 1439 }
1440 1440
1441 if (!err) { 1441 if (!err) {
1442 err = gk20a_busy(dev); 1442 err = gk20a_busy(g);
1443 if (!err) { 1443 if (!err) {
1444 err = g->ops.gr.zbc_set_table(g, &g->gr, 1444 err = g->ops.gr.zbc_set_table(g, &g->gr,
1445 zbc_val); 1445 zbc_val);
1446 gk20a_idle(dev); 1446 gk20a_idle(g);
1447 } 1447 }
1448 } 1448 }
1449 1449
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
index 0736a03b..c75689f2 100644
--- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
@@ -249,7 +249,7 @@ static int gk20a_ctxsw_dev_ioctl_poll(struct gk20a_ctxsw_dev *dev)
249 249
250 gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, ""); 250 gk20a_dbg(gpu_dbg_fn|gpu_dbg_ctxsw, "");
251 251
252 err = gk20a_busy(g->dev); 252 err = gk20a_busy(g);
253 if (err) 253 if (err)
254 return err; 254 return err;
255 255
@@ -259,7 +259,7 @@ static int gk20a_ctxsw_dev_ioctl_poll(struct gk20a_ctxsw_dev *dev)
259 if (likely(!err)) 259 if (likely(!err))
260 err = g->ops.fecs_trace.poll(g); 260 err = g->ops.fecs_trace.poll(g);
261 261
262 gk20a_idle(g->dev); 262 gk20a_idle(g);
263 return err; 263 return err;
264} 264}
265 265
@@ -287,7 +287,7 @@ int gk20a_ctxsw_dev_open(struct inode *inode, struct file *filp)
287 goto free_ref; 287 goto free_ref;
288 } 288 }
289 289
290 err = gk20a_busy(g->dev); 290 err = gk20a_busy(g);
291 if (err) 291 if (err)
292 goto free_ref; 292 goto free_ref;
293 293
@@ -330,7 +330,7 @@ done:
330 nvgpu_mutex_release(&dev->write_lock); 330 nvgpu_mutex_release(&dev->write_lock);
331 331
332idle: 332idle:
333 gk20a_idle(g->dev); 333 gk20a_idle(g);
334free_ref: 334free_ref:
335 if (err) 335 if (err)
336 gk20a_put(g); 336 gk20a_put(g);
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
index fb70c88b..0efbcf06 100644
--- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
@@ -766,14 +766,14 @@ static int nvgpu_dbg_gpu_ioctl_clear_single_sm_error_state(
766 if (sm_id >= gr->no_of_sm) 766 if (sm_id >= gr->no_of_sm)
767 return -EINVAL; 767 return -EINVAL;
768 768
769 err = gk20a_busy(g->dev); 769 err = gk20a_busy(g);
770 if (err) 770 if (err)
771 return err; 771 return err;
772 772
773 err = gr_gk20a_elpg_protected_call(g, 773 err = gr_gk20a_elpg_protected_call(g,
774 g->ops.gr.clear_sm_error_state(g, ch, sm_id)); 774 g->ops.gr.clear_sm_error_state(g, ch, sm_id));
775 775
776 gk20a_idle(g->dev); 776 gk20a_idle(g);
777 777
778 return err; 778 return err;
779} 779}
@@ -819,7 +819,7 @@ static int nvgpu_dbg_gpu_ioctl_write_single_sm_error_state(
819 } 819 }
820 } 820 }
821 821
822 err = gk20a_busy(g->dev); 822 err = gk20a_busy(g);
823 if (err) 823 if (err)
824 goto err_free; 824 goto err_free;
825 825
@@ -827,7 +827,7 @@ static int nvgpu_dbg_gpu_ioctl_write_single_sm_error_state(
827 g->ops.gr.update_sm_error_state(g, ch, 827 g->ops.gr.update_sm_error_state(g, ch,
828 sm_id, sm_error_state)); 828 sm_id, sm_error_state));
829 829
830 gk20a_idle(g->dev); 830 gk20a_idle(g);
831 831
832err_free: 832err_free:
833 kfree(sm_error_state); 833 kfree(sm_error_state);
@@ -843,7 +843,7 @@ nvgpu_dbg_gpu_ioctl_suspend_resume_contexts(struct dbg_session_gk20a *dbg_s,
843 int err = 0; 843 int err = 0;
844 int ctx_resident_ch_fd = -1; 844 int ctx_resident_ch_fd = -1;
845 845
846 err = gk20a_busy(g->dev); 846 err = gk20a_busy(g);
847 if (err) 847 if (err)
848 return err; 848 return err;
849 849
@@ -866,7 +866,7 @@ nvgpu_dbg_gpu_ioctl_suspend_resume_contexts(struct dbg_session_gk20a *dbg_s,
866 args->resident_context_fd = ctx_resident_ch_fd; 866 args->resident_context_fd = ctx_resident_ch_fd;
867 } 867 }
868 868
869 gk20a_idle(g->dev); 869 gk20a_idle(g);
870 870
871 return err; 871 return err;
872} 872}
@@ -905,7 +905,7 @@ static int nvgpu_dbg_gpu_ioctl_access_fb_memory(struct dbg_session_gk20a *dbg_s,
905 size = args->size; 905 size = args->size;
906 offset = 0; 906 offset = 0;
907 907
908 err = gk20a_busy(g->dev); 908 err = gk20a_busy(g);
909 if (err) 909 if (err)
910 goto fail_free_buffer; 910 goto fail_free_buffer;
911 911
@@ -940,7 +940,7 @@ static int nvgpu_dbg_gpu_ioctl_access_fb_memory(struct dbg_session_gk20a *dbg_s,
940 } 940 }
941 941
942fail_idle: 942fail_idle:
943 gk20a_idle(g->dev); 943 gk20a_idle(g);
944fail_free_buffer: 944fail_free_buffer:
945 nvgpu_big_free(g, buffer); 945 nvgpu_big_free(g, buffer);
946fail_dmabuf_put: 946fail_dmabuf_put:
@@ -972,11 +972,11 @@ long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd,
972 } 972 }
973 973
974 if (!g->gr.sw_ready) { 974 if (!g->gr.sw_ready) {
975 err = gk20a_busy(g->dev); 975 err = gk20a_busy(g);
976 if (err) 976 if (err)
977 return err; 977 return err;
978 978
979 gk20a_idle(g->dev); 979 gk20a_idle(g);
980 } 980 }
981 981
982 /* protect from threaded user space calls */ 982 /* protect from threaded user space calls */
@@ -1283,7 +1283,7 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode)
1283 (g->dbg_powergating_disabled_refcount++ == 0)) { 1283 (g->dbg_powergating_disabled_refcount++ == 0)) {
1284 1284
1285 gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module busy"); 1285 gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module busy");
1286 err = gk20a_busy(g->dev); 1286 err = gk20a_busy(g);
1287 if (err) 1287 if (err)
1288 return err; 1288 return err;
1289 1289
@@ -1338,7 +1338,7 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode)
1338 gk20a_pmu_pg_global_enable(g, true); 1338 gk20a_pmu_pg_global_enable(g, true);
1339 1339
1340 gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module idle"); 1340 gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module idle");
1341 gk20a_idle(g->dev); 1341 gk20a_idle(g);
1342 } 1342 }
1343 1343
1344 dbg_s->is_pg_disabled = false; 1344 dbg_s->is_pg_disabled = false;
@@ -1381,7 +1381,7 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
1381 gk20a_dbg_fn("%s smpc ctxsw mode = %d", 1381 gk20a_dbg_fn("%s smpc ctxsw mode = %d",
1382 dev_name(dbg_s->dev), args->mode); 1382 dev_name(dbg_s->dev), args->mode);
1383 1383
1384 err = gk20a_busy(g->dev); 1384 err = gk20a_busy(g);
1385 if (err) { 1385 if (err) {
1386 gk20a_err(dev_from_gk20a(g), "failed to poweron"); 1386 gk20a_err(dev_from_gk20a(g), "failed to poweron");
1387 return err; 1387 return err;
@@ -1409,7 +1409,7 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
1409 err = g->ops.regops.apply_smpc_war(dbg_s); 1409 err = g->ops.regops.apply_smpc_war(dbg_s);
1410 clean_up: 1410 clean_up:
1411 nvgpu_mutex_release(&g->dbg_sessions_lock); 1411 nvgpu_mutex_release(&g->dbg_sessions_lock);
1412 gk20a_idle(g->dev); 1412 gk20a_idle(g);
1413 return err; 1413 return err;
1414} 1414}
1415 1415
@@ -1433,8 +1433,7 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
1433 "session doesn't have a valid reservation"); 1433 "session doesn't have a valid reservation");
1434 } 1434 }
1435 1435
1436 1436 err = gk20a_busy(g);
1437 err = gk20a_busy(g->dev);
1438 if (err) { 1437 if (err) {
1439 gk20a_err(dev_from_gk20a(g), "failed to poweron"); 1438 gk20a_err(dev_from_gk20a(g), "failed to poweron");
1440 return err; 1439 return err;
@@ -1462,7 +1461,7 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
1462 */ 1461 */
1463 clean_up: 1462 clean_up:
1464 nvgpu_mutex_release(&g->dbg_sessions_lock); 1463 nvgpu_mutex_release(&g->dbg_sessions_lock);
1465 gk20a_idle(g->dev); 1464 gk20a_idle(g);
1466 return err; 1465 return err;
1467} 1466}
1468 1467
@@ -1480,7 +1479,7 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm(
1480 if (!ch) 1479 if (!ch)
1481 return -EINVAL; 1480 return -EINVAL;
1482 1481
1483 err = gk20a_busy(g->dev); 1482 err = gk20a_busy(g);
1484 if (err) { 1483 if (err) {
1485 gk20a_err(dev_from_gk20a(g), "failed to poweron"); 1484 gk20a_err(dev_from_gk20a(g), "failed to poweron");
1486 return err; 1485 return err;
@@ -1512,7 +1511,7 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm(
1512 1511
1513clean_up: 1512clean_up:
1514 nvgpu_mutex_release(&g->dbg_sessions_lock); 1513 nvgpu_mutex_release(&g->dbg_sessions_lock);
1515 gk20a_idle(g->dev); 1514 gk20a_idle(g);
1516 1515
1517 return err; 1516 return err;
1518} 1517}
@@ -1807,7 +1806,7 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s,
1807 goto fail_unmap; 1806 goto fail_unmap;
1808 } 1807 }
1809 1808
1810 err = gk20a_busy(g->dev); 1809 err = gk20a_busy(g);
1811 if (err) { 1810 if (err) {
1812 gk20a_err(dev_from_gk20a(g), "failed to poweron"); 1811 gk20a_err(dev_from_gk20a(g), "failed to poweron");
1813 goto fail_unmap; 1812 goto fail_unmap;
@@ -1830,7 +1829,7 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s,
1830 perf_pmasys_mem_block_valid_true_f() | 1829 perf_pmasys_mem_block_valid_true_f() |
1831 perf_pmasys_mem_block_target_lfb_f()); 1830 perf_pmasys_mem_block_target_lfb_f());
1832 1831
1833 gk20a_idle(g->dev); 1832 gk20a_idle(g);
1834 1833
1835 return 0; 1834 return 0;
1836 1835
@@ -1848,7 +1847,7 @@ static int gk20a_perfbuf_unmap(struct dbg_session_gk20a *dbg_s,
1848 if (!g->allow_all) 1847 if (!g->allow_all)
1849 return -EACCES; 1848 return -EACCES;
1850 1849
1851 err = gk20a_busy(g->dev); 1850 err = gk20a_busy(g);
1852 if (err) { 1851 if (err) {
1853 gk20a_err(dev_from_gk20a(g), "failed to poweron"); 1852 gk20a_err(dev_from_gk20a(g), "failed to poweron");
1854 return err; 1853 return err;
@@ -1864,7 +1863,7 @@ static int gk20a_perfbuf_unmap(struct dbg_session_gk20a *dbg_s,
1864 perf_pmasys_mem_block_valid_false_f() | 1863 perf_pmasys_mem_block_valid_false_f() |
1865 perf_pmasys_mem_block_target_f(0)); 1864 perf_pmasys_mem_block_target_f(0));
1866 1865
1867 gk20a_idle(g->dev); 1866 gk20a_idle(g);
1868 1867
1869 gk20a_vm_unmap_buffer(&g->mm.pmu.vm, args->offset, NULL); 1868 gk20a_vm_unmap_buffer(&g->mm.pmu.vm, args->offset, NULL);
1870 1869
diff --git a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
index 4836e386..a64bccf0 100644
--- a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
@@ -136,13 +136,14 @@ int gk20a_gr_debug_dump(struct device *dev)
136static int gk20a_gr_debug_show(struct seq_file *s, void *unused) 136static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
137{ 137{
138 struct device *dev = s->private; 138 struct device *dev = s->private;
139 struct gk20a *g = gk20a_get_platform(dev)->g;
139 struct gk20a_debug_output o = { 140 struct gk20a_debug_output o = {
140 .fn = gk20a_debug_write_to_seqfile, 141 .fn = gk20a_debug_write_to_seqfile,
141 .ctx = s, 142 .ctx = s,
142 }; 143 };
143 int err; 144 int err;
144 145
145 err = gk20a_busy(dev); 146 err = gk20a_busy(g);
146 if (err) { 147 if (err) {
147 gk20a_err(dev, "failed to power on gpu: %d", err); 148 gk20a_err(dev, "failed to power on gpu: %d", err);
148 return -EINVAL; 149 return -EINVAL;
@@ -150,7 +151,7 @@ static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
150 151
151 gk20a_gr_dump_regs(dev, &o); 152 gk20a_gr_dump_regs(dev, &o);
152 153
153 gk20a_idle(dev); 154 gk20a_idle(g);
154 155
155 return 0; 156 return 0;
156} 157}
@@ -183,7 +184,7 @@ static int gk20a_debug_show(struct seq_file *s, void *unused)
183 184
184 g = gk20a_get_platform(dev)->g; 185 g = gk20a_get_platform(dev)->g;
185 186
186 err = gk20a_busy(g->dev); 187 err = gk20a_busy(g);
187 if (err) { 188 if (err) {
188 gk20a_err(g->dev, "failed to power on gpu: %d", err); 189 gk20a_err(g->dev, "failed to power on gpu: %d", err);
189 return -EFAULT; 190 return -EFAULT;
@@ -193,7 +194,7 @@ static int gk20a_debug_show(struct seq_file *s, void *unused)
193 if (g->ops.debug.show_dump) 194 if (g->ops.debug.show_dump)
194 g->ops.debug.show_dump(g, &o); 195 g->ops.debug.show_dump(g, &o);
195 196
196 gk20a_idle(g->dev); 197 gk20a_idle(g);
197 return 0; 198 return 0;
198} 199}
199 200
diff --git a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
index 2c88b08e..da2421d9 100644
--- a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
@@ -332,7 +332,7 @@ static int gk20a_fecs_trace_poll(struct gk20a *g)
332 int cnt; 332 int cnt;
333 int err; 333 int err;
334 334
335 err = gk20a_busy(g->dev); 335 err = gk20a_busy(g);
336 if (unlikely(err)) 336 if (unlikely(err))
337 return err; 337 return err;
338 338
@@ -372,7 +372,7 @@ static int gk20a_fecs_trace_poll(struct gk20a *g)
372 372
373done: 373done:
374 nvgpu_mutex_release(&trace->poll_lock); 374 nvgpu_mutex_release(&trace->poll_lock);
375 gk20a_idle(g->dev); 375 gk20a_idle(g);
376 return err; 376 return err;
377} 377}
378 378
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 72528758..59f16bf6 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -1434,24 +1434,26 @@ static int gk20a_can_busy(struct gk20a *g)
1434 return 1; 1434 return 1;
1435} 1435}
1436 1436
1437int gk20a_busy(struct device *dev) 1437int gk20a_busy(struct gk20a *g)
1438{ 1438{
1439 int ret = 0; 1439 int ret = 0;
1440 struct gk20a *g; 1440 struct device *dev;
1441 struct gk20a_platform *platform;
1442
1443 if (!dev)
1444 return -ENODEV;
1445 1441
1446 g = get_gk20a(dev); 1442 if (!g)
1447 platform = gk20a_get_platform(dev);
1448
1449 if (!g || !gk20a_can_busy(g))
1450 return -ENODEV; 1443 return -ENODEV;
1451 1444
1452 atomic_inc(&g->usage_count); 1445 atomic_inc(&g->usage_count);
1453 1446
1454 down_read(&g->busy_lock); 1447 down_read(&g->busy_lock);
1448
1449 if (!gk20a_can_busy(g)) {
1450 ret = -ENODEV;
1451 atomic_dec(&g->usage_count);
1452 goto fail;
1453 }
1454
1455 dev = g->dev;
1456
1455 if (pm_runtime_enabled(dev)) { 1457 if (pm_runtime_enabled(dev)) {
1456 ret = pm_runtime_get_sync(dev); 1458 ret = pm_runtime_get_sync(dev);
1457 if (ret < 0) { 1459 if (ret < 0) {
@@ -1484,22 +1486,21 @@ void gk20a_idle_nosuspend(struct device *dev)
1484 pm_runtime_put_noidle(dev); 1486 pm_runtime_put_noidle(dev);
1485} 1487}
1486 1488
1487void gk20a_idle(struct device *dev) 1489void gk20a_idle(struct gk20a *g)
1488{ 1490{
1489 struct gk20a_platform *platform; 1491 struct device *dev;
1490 struct gk20a *g;
1491 1492
1492 if (!dev) 1493 atomic_dec(&g->usage_count);
1493 return; 1494 down_read(&g->busy_lock);
1494 1495
1495 g = get_gk20a(dev); 1496 dev = g->dev;
1496 platform = gk20a_get_platform(dev);
1497 1497
1498 atomic_dec(&g->usage_count); 1498 if (!(dev && gk20a_can_busy(g)))
1499 goto fail;
1499 1500
1500 if (pm_runtime_enabled(dev)) { 1501 if (pm_runtime_enabled(dev)) {
1501#ifdef CONFIG_PM 1502#ifdef CONFIG_PM
1502 if (atomic_read(&dev->power.usage_count) == 1) 1503 if (atomic_read(&g->dev->power.usage_count) == 1)
1503 gk20a_scale_notify_idle(dev); 1504 gk20a_scale_notify_idle(dev);
1504#endif 1505#endif
1505 1506
@@ -1509,6 +1510,8 @@ void gk20a_idle(struct device *dev)
1509 } else { 1510 } else {
1510 gk20a_scale_notify_idle(dev); 1511 gk20a_scale_notify_idle(dev);
1511 } 1512 }
1513fail:
1514 up_read(&g->busy_lock);
1512} 1515}
1513 1516
1514void gk20a_disable(struct gk20a *g, u32 units) 1517void gk20a_disable(struct gk20a *g, u32 units)
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 817315e7..25bcd895 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -1391,8 +1391,8 @@ void gk20a_remove_sysfs(struct device *dev);
1391 1391
1392void gk20a_busy_noresume(struct device *dev); 1392void gk20a_busy_noresume(struct device *dev);
1393void gk20a_idle_nosuspend(struct device *dev); 1393void gk20a_idle_nosuspend(struct device *dev);
1394int __must_check gk20a_busy(struct device *dev); 1394int __must_check gk20a_busy(struct gk20a *g);
1395void gk20a_idle(struct device *dev); 1395void gk20a_idle(struct gk20a *g);
1396void gk20a_disable(struct gk20a *g, u32 units); 1396void gk20a_disable(struct gk20a *g, u32 units);
1397void gk20a_enable(struct gk20a *g, u32 units); 1397void gk20a_enable(struct gk20a *g, u32 units);
1398void gk20a_reset(struct gk20a *g, u32 units); 1398void gk20a_reset(struct gk20a *g, u32 units);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
index 6611b120..2ab15357 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
@@ -48,7 +48,7 @@ static ssize_t elcg_enable_store(struct device *dev,
48 if (kstrtoul(buf, 10, &val) < 0) 48 if (kstrtoul(buf, 10, &val) < 0)
49 return -EINVAL; 49 return -EINVAL;
50 50
51 err = gk20a_busy(g->dev); 51 err = gk20a_busy(g);
52 if (err) 52 if (err)
53 return err; 53 return err;
54 54
@@ -60,7 +60,7 @@ static ssize_t elcg_enable_store(struct device *dev,
60 gr_gk20a_init_cg_mode(g, ELCG_MODE, ELCG_RUN); 60 gr_gk20a_init_cg_mode(g, ELCG_MODE, ELCG_RUN);
61 } 61 }
62 62
63 gk20a_idle(g->dev); 63 gk20a_idle(g);
64 64
65 dev_info(dev, "ELCG is %s.\n", g->elcg_enabled ? "enabled" : 65 dev_info(dev, "ELCG is %s.\n", g->elcg_enabled ? "enabled" :
66 "disabled"); 66 "disabled");
@@ -93,7 +93,7 @@ static ssize_t blcg_enable_store(struct device *dev,
93 else 93 else
94 g->blcg_enabled = false; 94 g->blcg_enabled = false;
95 95
96 err = gk20a_busy(g->dev); 96 err = gk20a_busy(g);
97 if (err) 97 if (err)
98 return err; 98 return err;
99 99
@@ -117,7 +117,7 @@ static ssize_t blcg_enable_store(struct device *dev,
117 if (g->ops.clock_gating.blcg_xbar_load_gating_prod) 117 if (g->ops.clock_gating.blcg_xbar_load_gating_prod)
118 g->ops.clock_gating.blcg_xbar_load_gating_prod(g, 118 g->ops.clock_gating.blcg_xbar_load_gating_prod(g,
119 g->blcg_enabled); 119 g->blcg_enabled);
120 gk20a_idle(g->dev); 120 gk20a_idle(g);
121 121
122 dev_info(dev, "BLCG is %s.\n", g->blcg_enabled ? "enabled" : 122 dev_info(dev, "BLCG is %s.\n", g->blcg_enabled ? "enabled" :
123 "disabled"); 123 "disabled");
@@ -156,7 +156,7 @@ static ssize_t slcg_enable_store(struct device *dev,
156 * init. Therefore, it would be incongruous to add it here. Once 156 * init. Therefore, it would be incongruous to add it here. Once
157 * it is added to init, we should add it here too. 157 * it is added to init, we should add it here too.
158 */ 158 */
159 err = gk20a_busy(g->dev); 159 err = gk20a_busy(g);
160 if (err) 160 if (err)
161 return err; 161 return err;
162 162
@@ -184,7 +184,7 @@ static ssize_t slcg_enable_store(struct device *dev,
184 g->ops.clock_gating.slcg_pmu_load_gating_prod(g, g->slcg_enabled); 184 g->ops.clock_gating.slcg_pmu_load_gating_prod(g, g->slcg_enabled);
185 if (g->ops.clock_gating.slcg_xbar_load_gating_prod) 185 if (g->ops.clock_gating.slcg_xbar_load_gating_prod)
186 g->ops.clock_gating.slcg_xbar_load_gating_prod(g, g->slcg_enabled); 186 g->ops.clock_gating.slcg_xbar_load_gating_prod(g, g->slcg_enabled);
187 gk20a_idle(g->dev); 187 gk20a_idle(g);
188 188
189 dev_info(dev, "SLCG is %s.\n", g->slcg_enabled ? "enabled" : 189 dev_info(dev, "SLCG is %s.\n", g->slcg_enabled ? "enabled" :
190 "disabled"); 190 "disabled");
@@ -289,6 +289,8 @@ static ssize_t railgate_enable_store(struct device *dev,
289{ 289{
290 struct gk20a_platform *platform = dev_get_drvdata(dev); 290 struct gk20a_platform *platform = dev_get_drvdata(dev);
291 unsigned long railgate_enable = 0; 291 unsigned long railgate_enable = 0;
292 /* dev is guaranteed to be valid here. Ok to de-reference */
293 struct gk20a *g = get_gk20a(dev);
292 int err = 0; 294 int err = 0;
293 295
294 if (kstrtoul(buf, 10, &railgate_enable) < 0) 296 if (kstrtoul(buf, 10, &railgate_enable) < 0)
@@ -296,12 +298,12 @@ static ssize_t railgate_enable_store(struct device *dev,
296 298
297 if (railgate_enable && !platform->can_railgate) { 299 if (railgate_enable && !platform->can_railgate) {
298 /* release extra ref count */ 300 /* release extra ref count */
299 gk20a_idle(dev); 301 gk20a_idle(g);
300 platform->can_railgate = true; 302 platform->can_railgate = true;
301 platform->user_railgate_disabled = false; 303 platform->user_railgate_disabled = false;
302 } else if (railgate_enable == 0 && platform->can_railgate) { 304 } else if (railgate_enable == 0 && platform->can_railgate) {
303 /* take extra ref count */ 305 /* take extra ref count */
304 err = gk20a_busy(dev); 306 err = gk20a_busy(g);
305 if (err) 307 if (err)
306 return err; 308 return err;
307 platform->can_railgate = false; 309 platform->can_railgate = false;
@@ -348,10 +350,10 @@ static ssize_t railgate_delay_store(struct device *dev,
348 dev_err(dev, "Invalid powergate delay\n"); 350 dev_err(dev, "Invalid powergate delay\n");
349 351
350 /* wake-up system to make rail-gating delay effective immediately */ 352 /* wake-up system to make rail-gating delay effective immediately */
351 err = gk20a_busy(g->dev); 353 err = gk20a_busy(g);
352 if (err) 354 if (err)
353 return err; 355 return err;
354 gk20a_idle(g->dev); 356 gk20a_idle(g);
355 357
356 return count; 358 return count;
357} 359}
@@ -417,13 +419,13 @@ static ssize_t gk20a_load_show(struct device *dev,
417 if (!g->power_on) { 419 if (!g->power_on) {
418 busy_time = 0; 420 busy_time = 0;
419 } else { 421 } else {
420 err = gk20a_busy(g->dev); 422 err = gk20a_busy(g);
421 if (err) 423 if (err)
422 return err; 424 return err;
423 425
424 gk20a_pmu_load_update(g); 426 gk20a_pmu_load_update(g);
425 gk20a_pmu_load_norm(g, &busy_time); 427 gk20a_pmu_load_norm(g, &busy_time);
426 gk20a_idle(g->dev); 428 gk20a_idle(g);
427 } 429 }
428 430
429 res = snprintf(buf, PAGE_SIZE, "%u\n", busy_time); 431 res = snprintf(buf, PAGE_SIZE, "%u\n", busy_time);
@@ -445,7 +447,7 @@ static ssize_t elpg_enable_store(struct device *dev,
445 if (!g->power_on) { 447 if (!g->power_on) {
446 g->elpg_enabled = val ? true : false; 448 g->elpg_enabled = val ? true : false;
447 } else { 449 } else {
448 err = gk20a_busy(g->dev); 450 err = gk20a_busy(g);
449 if (err) 451 if (err)
450 return -EAGAIN; 452 return -EAGAIN;
451 /* 453 /*
@@ -468,7 +470,7 @@ static ssize_t elpg_enable_store(struct device *dev,
468 gk20a_pmu_pg_global_enable(g, false); 470 gk20a_pmu_pg_global_enable(g, false);
469 } 471 }
470 } 472 }
471 gk20a_idle(g->dev); 473 gk20a_idle(g);
472 } 474 }
473 dev_info(dev, "ELPG is %s.\n", g->elpg_enabled ? "enabled" : 475 dev_info(dev, "ELPG is %s.\n", g->elpg_enabled ? "enabled" :
474 "disabled"); 476 "disabled");
@@ -500,7 +502,7 @@ static ssize_t mscg_enable_store(struct device *dev,
500 if (!g->power_on) { 502 if (!g->power_on) {
501 g->mscg_enabled = val ? true : false; 503 g->mscg_enabled = val ? true : false;
502 } else { 504 } else {
503 err = gk20a_busy(g->dev); 505 err = gk20a_busy(g);
504 if (err) 506 if (err)
505 return -EAGAIN; 507 return -EAGAIN;
506 /* 508 /*
@@ -532,7 +534,7 @@ static ssize_t mscg_enable_store(struct device *dev,
532 } 534 }
533 g->mscg_enabled = false; 535 g->mscg_enabled = false;
534 } 536 }
535 gk20a_idle(g->dev); 537 gk20a_idle(g);
536 } 538 }
537 dev_info(dev, "MSCG is %s.\n", g->mscg_enabled ? "enabled" : 539 dev_info(dev, "MSCG is %s.\n", g->mscg_enabled ? "enabled" :
538 "disabled"); 540 "disabled");
@@ -617,7 +619,7 @@ static ssize_t aelpg_enable_store(struct device *dev,
617 if (kstrtoul(buf, 10, &val) < 0) 619 if (kstrtoul(buf, 10, &val) < 0)
618 return -EINVAL; 620 return -EINVAL;
619 621
620 err = gk20a_busy(g->dev); 622 err = gk20a_busy(g);
621 if (err) 623 if (err)
622 return err; 624 return err;
623 625
@@ -636,7 +638,7 @@ static ssize_t aelpg_enable_store(struct device *dev,
636 } else { 638 } else {
637 dev_info(dev, "PMU is not ready, AELPG request failed\n"); 639 dev_info(dev, "PMU is not ready, AELPG request failed\n");
638 } 640 }
639 gk20a_idle(g->dev); 641 gk20a_idle(g);
640 642
641 dev_info(dev, "AELPG is %s.\n", g->aelpg_enabled ? "enabled" : 643 dev_info(dev, "AELPG is %s.\n", g->aelpg_enabled ? "enabled" :
642 "disabled"); 644 "disabled");
@@ -674,9 +676,9 @@ static ssize_t allow_all_enable_store(struct device *dev,
674 if (kstrtoul(buf, 10, &val) < 0) 676 if (kstrtoul(buf, 10, &val) < 0)
675 return -EINVAL; 677 return -EINVAL;
676 678
677 err = gk20a_busy(g->dev); 679 err = gk20a_busy(g);
678 g->allow_all = (val ? true : false); 680 g->allow_all = (val ? true : false);
679 gk20a_idle(g->dev); 681 gk20a_idle(g);
680 682
681 return count; 683 return count;
682} 684}
@@ -811,7 +813,7 @@ static ssize_t tpc_fs_mask_read(struct device *dev,
811 u32 tpc_fs_mask = 0; 813 u32 tpc_fs_mask = 0;
812 int err = 0; 814 int err = 0;
813 815
814 err = gk20a_busy(g->dev); 816 err = gk20a_busy(g);
815 if (err) 817 if (err)
816 return err; 818 return err;
817 819
@@ -822,7 +824,7 @@ static ssize_t tpc_fs_mask_read(struct device *dev,
822 (gr->max_tpc_per_gpc_count * gpc_index); 824 (gr->max_tpc_per_gpc_count * gpc_index);
823 } 825 }
824 826
825 gk20a_idle(g->dev); 827 gk20a_idle(g);
826 828
827 return snprintf(buf, PAGE_SIZE, "0x%x\n", tpc_fs_mask); 829 return snprintf(buf, PAGE_SIZE, "0x%x\n", tpc_fs_mask);
828} 830}
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index ee995d44..a240ccf1 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -5231,7 +5231,7 @@ int gk20a_pmu_load_update(struct gk20a *g)
5231void gk20a_pmu_get_load_counters(struct gk20a *g, u32 *busy_cycles, 5231void gk20a_pmu_get_load_counters(struct gk20a *g, u32 *busy_cycles,
5232 u32 *total_cycles) 5232 u32 *total_cycles)
5233{ 5233{
5234 if (!g->power_on || gk20a_busy(g->dev)) { 5234 if (!g->power_on || gk20a_busy(g)) {
5235 *busy_cycles = 0; 5235 *busy_cycles = 0;
5236 *total_cycles = 0; 5236 *total_cycles = 0;
5237 return; 5237 return;
@@ -5242,20 +5242,20 @@ void gk20a_pmu_get_load_counters(struct gk20a *g, u32 *busy_cycles,
5242 rmb(); 5242 rmb();
5243 *total_cycles = pwr_pmu_idle_count_value_v( 5243 *total_cycles = pwr_pmu_idle_count_value_v(
5244 gk20a_readl(g, pwr_pmu_idle_count_r(2))); 5244 gk20a_readl(g, pwr_pmu_idle_count_r(2)));
5245 gk20a_idle(g->dev); 5245 gk20a_idle(g);
5246} 5246}
5247 5247
5248void gk20a_pmu_reset_load_counters(struct gk20a *g) 5248void gk20a_pmu_reset_load_counters(struct gk20a *g)
5249{ 5249{
5250 u32 reg_val = pwr_pmu_idle_count_reset_f(1); 5250 u32 reg_val = pwr_pmu_idle_count_reset_f(1);
5251 5251
5252 if (!g->power_on || gk20a_busy(g->dev)) 5252 if (!g->power_on || gk20a_busy(g))
5253 return; 5253 return;
5254 5254
5255 gk20a_writel(g, pwr_pmu_idle_count_r(2), reg_val); 5255 gk20a_writel(g, pwr_pmu_idle_count_r(2), reg_val);
5256 wmb(); 5256 wmb();
5257 gk20a_writel(g, pwr_pmu_idle_count_r(1), reg_val); 5257 gk20a_writel(g, pwr_pmu_idle_count_r(1), reg_val);
5258 gk20a_idle(g->dev); 5258 gk20a_idle(g);
5259} 5259}
5260 5260
5261void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, 5261void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
@@ -5499,13 +5499,13 @@ static int mscg_stat_show(struct seq_file *s, void *data)
5499 5499
5500 /* Don't unnecessarily power on the device */ 5500 /* Don't unnecessarily power on the device */
5501 if (g->power_on) { 5501 if (g->power_on) {
5502 err = gk20a_busy(g->dev); 5502 err = gk20a_busy(g);
5503 if (err) 5503 if (err)
5504 return err; 5504 return err;
5505 5505
5506 gk20a_pmu_get_pg_stats(g, 5506 gk20a_pmu_get_pg_stats(g,
5507 PMU_PG_ELPG_ENGINE_ID_MS, &pg_stat_data); 5507 PMU_PG_ELPG_ENGINE_ID_MS, &pg_stat_data);
5508 gk20a_idle(g->dev); 5508 gk20a_idle(g);
5509 } 5509 }
5510 total_ingating = g->pg_ingating_time_us + 5510 total_ingating = g->pg_ingating_time_us +
5511 (u64)pg_stat_data.ingating_time; 5511 (u64)pg_stat_data.ingating_time;
@@ -5557,13 +5557,13 @@ static int mscg_transitions_show(struct seq_file *s, void *data)
5557 int err; 5557 int err;
5558 5558
5559 if (g->power_on) { 5559 if (g->power_on) {
5560 err = gk20a_busy(g->dev); 5560 err = gk20a_busy(g);
5561 if (err) 5561 if (err)
5562 return err; 5562 return err;
5563 5563
5564 gk20a_pmu_get_pg_stats(g, 5564 gk20a_pmu_get_pg_stats(g,
5565 PMU_PG_ELPG_ENGINE_ID_MS, &pg_stat_data); 5565 PMU_PG_ELPG_ENGINE_ID_MS, &pg_stat_data);
5566 gk20a_idle(g->dev); 5566 gk20a_idle(g);
5567 } 5567 }
5568 total_gating_cnt = g->pg_gating_cnt + pg_stat_data.gating_cnt; 5568 total_gating_cnt = g->pg_gating_cnt + pg_stat_data.gating_cnt;
5569 5569
@@ -5593,13 +5593,13 @@ static int elpg_stat_show(struct seq_file *s, void *data)
5593 5593
5594 /* Don't unnecessarily power on the device */ 5594 /* Don't unnecessarily power on the device */
5595 if (g->power_on) { 5595 if (g->power_on) {
5596 err = gk20a_busy(g->dev); 5596 err = gk20a_busy(g);
5597 if (err) 5597 if (err)
5598 return err; 5598 return err;
5599 5599
5600 gk20a_pmu_get_pg_stats(g, 5600 gk20a_pmu_get_pg_stats(g,
5601 PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data); 5601 PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data);
5602 gk20a_idle(g->dev); 5602 gk20a_idle(g);
5603 } 5603 }
5604 total_ingating = g->pg_ingating_time_us + 5604 total_ingating = g->pg_ingating_time_us +
5605 (u64)pg_stat_data.ingating_time; 5605 (u64)pg_stat_data.ingating_time;
@@ -5650,13 +5650,13 @@ static int elpg_transitions_show(struct seq_file *s, void *data)
5650 int err; 5650 int err;
5651 5651
5652 if (g->power_on) { 5652 if (g->power_on) {
5653 err = gk20a_busy(g->dev); 5653 err = gk20a_busy(g);
5654 if (err) 5654 if (err)
5655 return err; 5655 return err;
5656 5656
5657 gk20a_pmu_get_pg_stats(g, 5657 gk20a_pmu_get_pg_stats(g,
5658 PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data); 5658 PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data);
5659 gk20a_idle(g->dev); 5659 gk20a_idle(g);
5660 } 5660 }
5661 total_gating_cnt = g->pg_gating_cnt + pg_stat_data.gating_cnt; 5661 total_gating_cnt = g->pg_gating_cnt + pg_stat_data.gating_cnt;
5662 5662
@@ -5772,7 +5772,7 @@ static ssize_t perfmon_events_enable_write(struct file *file,
5772 5772
5773 /* Don't turn on gk20a unnecessarily */ 5773 /* Don't turn on gk20a unnecessarily */
5774 if (g->power_on) { 5774 if (g->power_on) {
5775 err = gk20a_busy(g->dev); 5775 err = gk20a_busy(g);
5776 if (err) 5776 if (err)
5777 return err; 5777 return err;
5778 5778
@@ -5783,7 +5783,7 @@ static ssize_t perfmon_events_enable_write(struct file *file,
5783 g->pmu.perfmon_sampling_enabled = false; 5783 g->pmu.perfmon_sampling_enabled = false;
5784 pmu_perfmon_stop_sampling(&(g->pmu)); 5784 pmu_perfmon_stop_sampling(&(g->pmu));
5785 } 5785 }
5786 gk20a_idle(g->dev); 5786 gk20a_idle(g);
5787 } else { 5787 } else {
5788 g->pmu.perfmon_sampling_enabled = val ? true : false; 5788 g->pmu.perfmon_sampling_enabled = val ? true : false;
5789 } 5789 }
diff --git a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
index 6b372489..3185b211 100644
--- a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
@@ -233,13 +233,13 @@ static int gk20a_sched_dev_ioctl_tsg_set_timeslice(
233 if (!kref_get_unless_zero(&tsg->refcount)) 233 if (!kref_get_unless_zero(&tsg->refcount))
234 return -ENXIO; 234 return -ENXIO;
235 235
236 err = gk20a_busy(g->dev); 236 err = gk20a_busy(g);
237 if (err) 237 if (err)
238 goto done; 238 goto done;
239 239
240 err = gk20a_tsg_set_timeslice(tsg, arg->timeslice); 240 err = gk20a_tsg_set_timeslice(tsg, arg->timeslice);
241 241
242 gk20a_idle(g->dev); 242 gk20a_idle(g);
243 243
244done: 244done:
245 kref_put(&tsg->refcount, gk20a_tsg_release); 245 kref_put(&tsg->refcount, gk20a_tsg_release);
@@ -266,13 +266,13 @@ static int gk20a_sched_dev_ioctl_tsg_set_runlist_interleave(
266 if (!kref_get_unless_zero(&tsg->refcount)) 266 if (!kref_get_unless_zero(&tsg->refcount))
267 return -ENXIO; 267 return -ENXIO;
268 268
269 err = gk20a_busy(g->dev); 269 err = gk20a_busy(g);
270 if (err) 270 if (err)
271 goto done; 271 goto done;
272 272
273 err = gk20a_tsg_set_runlist_interleave(tsg, arg->runlist_interleave); 273 err = gk20a_tsg_set_runlist_interleave(tsg, arg->runlist_interleave);
274 274
275 gk20a_idle(g->dev); 275 gk20a_idle(g);
276 276
277done: 277done:
278 kref_put(&tsg->refcount, gk20a_tsg_release); 278 kref_put(&tsg->refcount, gk20a_tsg_release);
@@ -389,11 +389,11 @@ int gk20a_sched_dev_open(struct inode *inode, struct file *filp)
389 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "g=%p", g); 389 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "g=%p", g);
390 390
391 if (!sched->sw_ready) { 391 if (!sched->sw_ready) {
392 err = gk20a_busy(g->dev); 392 err = gk20a_busy(g);
393 if (err) 393 if (err)
394 goto free_ref; 394 goto free_ref;
395 395
396 gk20a_idle(g->dev); 396 gk20a_idle(g);
397 } 397 }
398 398
399 if (!nvgpu_mutex_tryacquire(&sched->busy_lock)) { 399 if (!nvgpu_mutex_tryacquire(&sched->busy_lock)) {
@@ -538,7 +538,7 @@ static int gk20a_sched_debugfs_show(struct seq_file *s, void *unused)
538 int i; 538 int i;
539 int err; 539 int err;
540 540
541 err = gk20a_busy(g->dev); 541 err = gk20a_busy(g);
542 if (err) 542 if (err)
543 return err; 543 return err;
544 544
@@ -563,7 +563,7 @@ static int gk20a_sched_debugfs_show(struct seq_file *s, void *unused)
563 563
564 nvgpu_mutex_release(&sched->status_lock); 564 nvgpu_mutex_release(&sched->status_lock);
565 565
566 gk20a_idle(g->dev); 566 gk20a_idle(g);
567 567
568 return 0; 568 return 0;
569} 569}
@@ -597,13 +597,13 @@ void gk20a_sched_ctrl_tsg_added(struct gk20a *g, struct tsg_gk20a *tsg)
597 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); 597 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
598 598
599 if (!sched->sw_ready) { 599 if (!sched->sw_ready) {
600 err = gk20a_busy(g->dev); 600 err = gk20a_busy(g);
601 if (err) { 601 if (err) {
602 WARN_ON(err); 602 WARN_ON(err);
603 return; 603 return;
604 } 604 }
605 605
606 gk20a_idle(g->dev); 606 gk20a_idle(g);
607 } 607 }
608 608
609 nvgpu_mutex_acquire(&sched->status_lock); 609 nvgpu_mutex_acquire(&sched->status_lock);
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 21b50700..7725e970 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -550,7 +550,7 @@ static int gk20a_tsg_ioctl_set_priority(struct gk20a *g,
550 goto done; 550 goto done;
551 } 551 }
552 552
553 err = gk20a_busy(g->dev); 553 err = gk20a_busy(g);
554 if (err) { 554 if (err) {
555 gk20a_err(dev_from_gk20a(g), "failed to power on gpu"); 555 gk20a_err(dev_from_gk20a(g), "failed to power on gpu");
556 goto done; 556 goto done;
@@ -558,7 +558,7 @@ static int gk20a_tsg_ioctl_set_priority(struct gk20a *g,
558 558
559 err = gk20a_tsg_set_priority(g, tsg, arg->priority); 559 err = gk20a_tsg_set_priority(g, tsg, arg->priority);
560 560
561 gk20a_idle(g->dev); 561 gk20a_idle(g);
562done: 562done:
563 nvgpu_mutex_release(&sched->control_lock); 563 nvgpu_mutex_release(&sched->control_lock);
564 return err; 564 return err;
@@ -577,7 +577,7 @@ static int gk20a_tsg_ioctl_set_runlist_interleave(struct gk20a *g,
577 err = -EPERM; 577 err = -EPERM;
578 goto done; 578 goto done;
579 } 579 }
580 err = gk20a_busy(g->dev); 580 err = gk20a_busy(g);
581 if (err) { 581 if (err) {
582 gk20a_err(dev_from_gk20a(g), "failed to power on gpu"); 582 gk20a_err(dev_from_gk20a(g), "failed to power on gpu");
583 goto done; 583 goto done;
@@ -585,7 +585,7 @@ static int gk20a_tsg_ioctl_set_runlist_interleave(struct gk20a *g,
585 585
586 err = gk20a_tsg_set_runlist_interleave(tsg, arg->level); 586 err = gk20a_tsg_set_runlist_interleave(tsg, arg->level);
587 587
588 gk20a_idle(g->dev); 588 gk20a_idle(g);
589done: 589done:
590 nvgpu_mutex_release(&sched->control_lock); 590 nvgpu_mutex_release(&sched->control_lock);
591 return err; 591 return err;
@@ -604,13 +604,13 @@ static int gk20a_tsg_ioctl_set_timeslice(struct gk20a *g,
604 err = -EPERM; 604 err = -EPERM;
605 goto done; 605 goto done;
606 } 606 }
607 err = gk20a_busy(g->dev); 607 err = gk20a_busy(g);
608 if (err) { 608 if (err) {
609 gk20a_err(dev_from_gk20a(g), "failed to power on gpu"); 609 gk20a_err(dev_from_gk20a(g), "failed to power on gpu");
610 goto done; 610 goto done;
611 } 611 }
612 err = gk20a_tsg_set_timeslice(tsg, arg->timeslice_us); 612 err = gk20a_tsg_set_timeslice(tsg, arg->timeslice_us);
613 gk20a_idle(g->dev); 613 gk20a_idle(g);
614done: 614done:
615 nvgpu_mutex_release(&sched->control_lock); 615 nvgpu_mutex_release(&sched->control_lock);
616 return err; 616 return err;
@@ -641,11 +641,11 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
641 } 641 }
642 642
643 if (!g->gr.sw_ready) { 643 if (!g->gr.sw_ready) {
644 err = gk20a_busy(g->dev); 644 err = gk20a_busy(g);
645 if (err) 645 if (err)
646 return err; 646 return err;
647 647
648 gk20a_idle(g->dev); 648 gk20a_idle(g);
649 } 649 }
650 650
651 switch (cmd) { 651 switch (cmd) {
@@ -668,33 +668,33 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
668 668
669 case NVGPU_IOCTL_TSG_ENABLE: 669 case NVGPU_IOCTL_TSG_ENABLE:
670 { 670 {
671 err = gk20a_busy(g->dev); 671 err = gk20a_busy(g);
672 if (err) { 672 if (err) {
673 gk20a_err(g->dev, 673 gk20a_err(g->dev,
674 "failed to host gk20a for ioctl cmd: 0x%x", cmd); 674 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
675 return err; 675 return err;
676 } 676 }
677 gk20a_enable_tsg(tsg); 677 gk20a_enable_tsg(tsg);
678 gk20a_idle(g->dev); 678 gk20a_idle(g);
679 break; 679 break;
680 } 680 }
681 681
682 case NVGPU_IOCTL_TSG_DISABLE: 682 case NVGPU_IOCTL_TSG_DISABLE:
683 { 683 {
684 err = gk20a_busy(g->dev); 684 err = gk20a_busy(g);
685 if (err) { 685 if (err) {
686 gk20a_err(g->dev, 686 gk20a_err(g->dev,
687 "failed to host gk20a for ioctl cmd: 0x%x", cmd); 687 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
688 return err; 688 return err;
689 } 689 }
690 gk20a_disable_tsg(tsg); 690 gk20a_disable_tsg(tsg);
691 gk20a_idle(g->dev); 691 gk20a_idle(g);
692 break; 692 break;
693 } 693 }
694 694
695 case NVGPU_IOCTL_TSG_PREEMPT: 695 case NVGPU_IOCTL_TSG_PREEMPT:
696 { 696 {
697 err = gk20a_busy(g->dev); 697 err = gk20a_busy(g);
698 if (err) { 698 if (err) {
699 gk20a_err(g->dev, 699 gk20a_err(g->dev,
700 "failed to host gk20a for ioctl cmd: 0x%x", cmd); 700 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
@@ -702,7 +702,7 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
702 } 702 }
703 /* preempt TSG */ 703 /* preempt TSG */
704 err = g->ops.fifo.preempt_tsg(g, tsg->tsgid); 704 err = g->ops.fifo.preempt_tsg(g, tsg->tsgid);
705 gk20a_idle(g->dev); 705 gk20a_idle(g);
706 break; 706 break;
707 } 707 }
708 708
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
index fc352151..07b5d454 100644
--- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
@@ -1751,7 +1751,7 @@ static int monitor_get(void *data, u64 *val)
1751 u64 freq = clk->gpc_pll.clk_in; 1751 u64 freq = clk->gpc_pll.clk_in;
1752 u32 count1, count2; 1752 u32 count1, count2;
1753 1753
1754 err = gk20a_busy(g->dev); 1754 err = gk20a_busy(g);
1755 if (err) 1755 if (err)
1756 return err; 1756 return err;
1757 1757
@@ -1789,7 +1789,7 @@ static int monitor_get(void *data, u64 *val)
1789 gk20a_writel(g, therm_clk_slowdown_r(0), clk_slowdown_save); 1789 gk20a_writel(g, therm_clk_slowdown_r(0), clk_slowdown_save);
1790 nvgpu_mutex_release(&g->clk.clk_mutex); 1790 nvgpu_mutex_release(&g->clk.clk_mutex);
1791 1791
1792 gk20a_idle(g->dev); 1792 gk20a_idle(g);
1793 1793
1794 if (count1 != count2) 1794 if (count1 != count2)
1795 return -EBUSY; 1795 return -EBUSY;
@@ -1807,7 +1807,7 @@ static int voltage_get(void *data, u64 *val)
1807 if (clk->gpc_pll.mode != GPC_PLL_MODE_DVFS) 1807 if (clk->gpc_pll.mode != GPC_PLL_MODE_DVFS)
1808 return -ENOSYS; 1808 return -ENOSYS;
1809 1809
1810 err = gk20a_busy(g->dev); 1810 err = gk20a_busy(g);
1811 if (err) 1811 if (err)
1812 return err; 1812 return err;
1813 1813
@@ -1820,7 +1820,7 @@ static int voltage_get(void *data, u64 *val)
1820 1820
1821 nvgpu_mutex_release(&g->clk.clk_mutex); 1821 nvgpu_mutex_release(&g->clk.clk_mutex);
1822 1822
1823 gk20a_idle(g->dev); 1823 gk20a_idle(g);
1824 return 0; 1824 return 0;
1825} 1825}
1826DEFINE_SIMPLE_ATTRIBUTE(voltage_fops, voltage_get, NULL, "%llu\n"); 1826DEFINE_SIMPLE_ATTRIBUTE(voltage_fops, voltage_get, NULL, "%llu\n");
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 14:33:23 -0400