diff options
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_pg.c | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmu.h | 1 |
3 files changed, 45 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c index 3d46298d..941cee75 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -359,6 +359,36 @@ exit_unlock: | |||
359 | return ret; | 359 | return ret; |
360 | } | 360 | } |
361 | 361 | ||
362 | int nvgpu_pmu_reenable_elpg(struct gk20a *g) | ||
363 | { | ||
364 | struct nvgpu_pmu *pmu = &g->pmu; | ||
365 | int ret = 0; | ||
366 | |||
367 | nvgpu_log_fn(g, " "); | ||
368 | |||
369 | if (!g->support_pmu) { | ||
370 | return ret; | ||
371 | } | ||
372 | |||
373 | /* If pmu enabled, re-enable by first disabling, then | ||
374 | * enabling | ||
375 | */ | ||
376 | if (pmu->elpg_refcnt != 0) { | ||
377 | ret = nvgpu_pmu_disable_elpg(g); | ||
378 | if (ret != 0) { | ||
379 | nvgpu_err(g, "failed disabling elpg"); | ||
380 | goto exit; | ||
381 | } | ||
382 | ret = nvgpu_pmu_enable_elpg(g); | ||
383 | if (ret != 0) { | ||
384 | nvgpu_err(g, "failed enabling elpg"); | ||
385 | goto exit; | ||
386 | } | ||
387 | } | ||
388 | exit: | ||
389 | return ret; | ||
390 | } | ||
391 | |||
362 | /* PG init */ | 392 | /* PG init */ |
363 | static void pmu_handle_pg_stat_msg(struct gk20a *g, struct pmu_msg *msg, | 393 | static void pmu_handle_pg_stat_msg(struct gk20a *g, struct pmu_msg *msg, |
364 | void *param, u32 handle, u32 status) | 394 | void *param, u32 handle, u32 status) |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 4f8006b2..223937c6 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Graphics | 2 | * GK20A Graphics |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -3128,7 +3128,7 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags) | |||
3128 | goto out; | 3128 | goto out; |
3129 | } | 3129 | } |
3130 | 3130 | ||
3131 | /* init golden image, ELPG enabled after this is done */ | 3131 | /* init golden image */ |
3132 | err = gr_gk20a_init_golden_ctx_image(g, c); | 3132 | err = gr_gk20a_init_golden_ctx_image(g, c); |
3133 | if (err != 0) { | 3133 | if (err != 0) { |
3134 | nvgpu_err(g, | 3134 | nvgpu_err(g, |
@@ -3136,6 +3136,17 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags) | |||
3136 | goto out; | 3136 | goto out; |
3137 | } | 3137 | } |
3138 | 3138 | ||
3139 | /* Re-enable ELPG now that golden image has been initialized. | ||
3140 | * The PMU PG init code may already have tried to enable elpg, but | ||
3141 | * would not have been able to complete this action since the golden | ||
3142 | * image hadn't been initialized yet, so do this now. | ||
3143 | */ | ||
3144 | err = nvgpu_pmu_reenable_elpg(g); | ||
3145 | if (err != 0) { | ||
3146 | nvgpu_err(g, "fail to re-enable elpg"); | ||
3147 | goto out; | ||
3148 | } | ||
3149 | |||
3139 | /* load golden image */ | 3150 | /* load golden image */ |
3140 | gr_gk20a_load_golden_ctx_image(g, c); | 3151 | gr_gk20a_load_golden_ctx_image(g, c); |
3141 | if (err != 0) { | 3152 | if (err != 0) { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h index dcd49481..2b745c76 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h | |||
@@ -495,6 +495,7 @@ void nvgpu_pmu_setup_hw_load_zbc(struct gk20a *g); | |||
495 | int nvgpu_pmu_reset(struct gk20a *g); | 495 | int nvgpu_pmu_reset(struct gk20a *g); |
496 | 496 | ||
497 | /* PG enable/disable */ | 497 | /* PG enable/disable */ |
498 | int nvgpu_pmu_reenable_elpg(struct gk20a *g); | ||
498 | int nvgpu_pmu_enable_elpg(struct gk20a *g); | 499 | int nvgpu_pmu_enable_elpg(struct gk20a *g); |
499 | int nvgpu_pmu_disable_elpg(struct gk20a *g); | 500 | int nvgpu_pmu_disable_elpg(struct gk20a *g); |
500 | int nvgpu_pmu_pg_global_enable(struct gk20a *g, u32 enable_pg); | 501 | int nvgpu_pmu_pg_global_enable(struct gk20a *g, u32 enable_pg); |