6 files changed, 29 insertions, 15 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 688992c6..d750f497 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -138,7 +138,7 @@ int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g,
 {
         struct gk20a_platform *platform = platform_get_drvdata(g->dev);
         int value = scale_ptimer(timeslice_period,
-                        platform->ptimerscaling10x);
+                        ptimer_scalingfactor10x(platform->ptimer_src_freq));
         int shift = 3;
 
         /* value field is 8 bits long */
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 5eba9f12..f6f0cb1d 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -410,7 +410,8 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
                 g->ops.fifo.apply_pb_timeout(g);
 
         timeout = GRFIFO_TIMEOUT_CHECK_PERIOD_US;
-        timeout = scale_ptimer(timeout, platform->ptimerscaling10x);
+        timeout = scale_ptimer(timeout,
+                ptimer_scalingfactor10x(platform->ptimer_src_freq));
         timeout |= fifo_eng_timeout_detection_enabled_f();
         gk20a_writel(g, fifo_eng_timeout_r(), timeout);
 
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index e106c479..58c8e9ad 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -50,6 +50,10 @@ struct acr_gm20b;
 #include "cde_gk20a.h"
 #include "debug_gk20a.h"
 
+/* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds.
+    32 ns is the resolution of ptimer. */
+#define PTIMER_REF_FREQ_HZ                      31250000
+
 struct cooling_device_gk20a {
         struct thermal_cooling_device *gk20a_cooling_dev;
         unsigned int gk20a_freq_state;
@@ -901,6 +905,10 @@ void gk20a_user_deinit(struct platform_device *dev);
 
 extern void gk20a_debug_dump_device(struct platform_device *pdev);
 
+static inline u32 ptimer_scalingfactor10x(u32 ptimer_src_freq)
+{
+        return (u32)(((u64)(PTIMER_REF_FREQ_HZ * 10)) / ptimer_src_freq);
+}
 static inline u32 scale_ptimer(u32 timeout , u32 scale10x)
 {
         if (((timeout*10) % scale10x) >= (scale10x/2))
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
index 945b332d..2d803d0e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
@@ -23,7 +23,6 @@
 #include <linux/kernel.h>
 #include <linux/fb.h>
 #include <linux/gk20a.h>
-
 #include <mach/clk.h>
 
 #include "gk20a.h"
@@ -33,9 +32,6 @@
 
 
 #define PTIMER_FP_FACTOR                        1000000
-/* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. 32 ns is
-   the resolution of ptimer. */
-#define PTIMER_REF_FREQ_HZ                      31250000
 
 #define ROOTRW (S_IRWXU|S_IRGRP|S_IROTH)
 
@@ -208,17 +204,27 @@ static ssize_t ptimer_scale_factor_show(struct device *dev,
                                                 struct device_attribute *attr,
                                                 char *buf)
 {
-        u32 tsc_freq_hz = clk_get_rate(clk_get_sys(NULL, "clk_m"));
-        u32 scaling_factor_fp = (u32)(PTIMER_REF_FREQ_HZ) /
-                                ((u32)(tsc_freq_hz) /
+        struct gk20a_platform *platform = dev_get_drvdata(dev);
+        u32 src_freq_hz = platform->ptimer_src_freq;
+        u32 scaling_factor_fp;
+        ssize_t res;
+
+        if (!src_freq_hz) {
+                dev_err(dev, "reference clk_m rate is not set correctly\n");
+                return -EINVAL;
+        }
+
+        scaling_factor_fp = (u32)(PTIMER_REF_FREQ_HZ) /
+                                ((u32)(src_freq_hz) /
                                 (u32)(PTIMER_FP_FACTOR));
-        ssize_t res = snprintf(buf,
+        res = snprintf(buf,
                                 PAGE_SIZE,
                                 "%u.%u\n",
                                 scaling_factor_fp / PTIMER_FP_FACTOR,
                                 scaling_factor_fp % PTIMER_FP_FACTOR);
 
         return res;
+
 }
 
 static DEVICE_ATTR(ptimer_scale_factor,
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index 0c3c6ff3..c1444985 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -97,9 +97,6 @@ struct gk20a_platform {
         /* Default big page size 64K or 128K */
         u32 default_big_page_size;
 
-        /* scaling factor for ptimer */
-        u32  ptimerscaling10x;
-
         /* Initialize the platform interface of the gk20a driver.
          *
          * The platform implementation of this function must
@@ -191,6 +188,8 @@ struct gk20a_platform {
         u64 virt_handle;
         struct task_struct *intr_handler;
 #endif
+        /* source frequency for ptimer in hz */
+        u32 ptimer_src_freq;
 
         bool has_cde;
 };
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
index 2c9cfb63..8733f356 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
@@ -812,7 +812,7 @@ struct gk20a_platform gk20a_tegra_platform = {
         .enable_elcg            = true,
         .enable_elpg            = true,
         .enable_aelpg           = true,
-        .ptimerscaling10x       = 26,
+        .ptimer_src_freq        = 12000000,
 
         .force_reset_in_do_idle = false,
 
@@ -861,7 +861,7 @@ struct gk20a_platform gm20b_tegra_platform = {
         .enable_elcg            = true,
         .enable_elpg            = true,
         .enable_aelpg           = true,
-        .ptimerscaling10x       = 26,
+        .ptimer_src_freq        = 19200000,
 
         .force_reset_in_do_idle = false,