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-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gm206/bios_gm206.c8
-rw-r--r--drivers/gpu/nvgpu/pci.c93
4 files changed, 85 insertions, 21 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 9eebfe88..55ebf2da 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -1059,6 +1059,9 @@ int gk20a_pm_finalize_poweron(struct device *dev)
1059 } 1059 }
1060 1060
1061done: 1061done:
1062 if (err)
1063 g->power_on = false;
1064
1062 return err; 1065 return err;
1063} 1066}
1064 1067
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index 6afd4852..de7bbd06 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -225,6 +225,8 @@ struct gk20a_platform {
225 /* if vidmem aperture actually points to vidmem*/ 225 /* if vidmem aperture actually points to vidmem*/
226 bool vidmem_is_vidmem; 226 bool vidmem_is_vidmem;
227 227
228 /* minimum supported VBIOS version */
229 u32 vbios_min_version;
228}; 230};
229 231
230static inline struct gk20a_platform *gk20a_get_platform( 232static inline struct gk20a_platform *gk20a_get_platform(
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c
index ea65e392..aa40f410 100644
--- a/drivers/gpu/nvgpu/gm206/bios_gm206.c
+++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c
@@ -894,6 +894,14 @@ static int gm206_bios_init(struct gk20a *g)
894 gk20a_err(g->dev, "no valid VBIOS found"); 894 gk20a_err(g->dev, "no valid VBIOS found");
895 return -EINVAL; 895 return -EINVAL;
896 } 896 }
897
898 if (g->gpu_characteristics.vbios_version <
899 platform->vbios_min_version) {
900 gk20a_err(g->dev, "unsupported VBIOS version %08x",
901 g->gpu_characteristics.vbios_version);
902 return -EINVAL;
903 }
904
897 g->bios_blob.data = g->bios.data; 905 g->bios_blob.data = g->bios.data;
898 g->bios_blob.size = g->bios.size; 906 g->bios_blob.size = g->bios.size;
899 907
diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c
index a3d53440..838ad706 100644
--- a/drivers/gpu/nvgpu/pci.c
+++ b/drivers/gpu/nvgpu/pci.c
@@ -39,7 +39,8 @@ static bool nvgpu_pci_tegra_is_railgated(struct device *pdev)
39 return false; 39 return false;
40} 40}
41 41
42static struct gk20a_platform nvgpu_pci_device = { 42static struct gk20a_platform nvgpu_pci_device[] = {
43 { /* DEVICE=0x1c35 */
43 /* ptimer src frequency in hz */ 44 /* ptimer src frequency in hz */
44 .ptimer_src_freq = 31250000, 45 .ptimer_src_freq = 31250000,
45 46
@@ -50,6 +51,9 @@ static struct gk20a_platform nvgpu_pci_device = {
50 .railgate_delay = 500, 51 .railgate_delay = 500,
51 .can_railgate = false, 52 .can_railgate = false,
52 .can_elpg = false, 53 .can_elpg = false,
54 .enable_elcg = true,
55 .enable_slcg = true,
56 .enable_blcg = true,
53 57
54 /* power management callbacks */ 58 /* power management callbacks */
55 .is_railgated = nvgpu_pci_tegra_is_railgated, 59 .is_railgated = nvgpu_pci_tegra_is_railgated,
@@ -61,35 +65,82 @@ static struct gk20a_platform nvgpu_pci_device = {
61 .has_ce = true, 65 .has_ce = true,
62 66
63 .vidmem_is_vidmem = true, 67 .vidmem_is_vidmem = true,
64}; 68 .vbios_min_version = 0x86062d00,
69 },
70 { /* DEVICE=0x1c36 */
71 /* ptimer src frequency in hz */
72 .ptimer_src_freq = 31250000,
73
74 .probe = nvgpu_pci_tegra_probe,
75 .remove = nvgpu_pci_tegra_remove,
76
77 /* power management configuration */
78 .railgate_delay = 500,
79 .can_railgate = false,
80 .can_elpg = false,
81 .enable_elcg = true,
82 .enable_slcg = true,
83 .enable_blcg = true,
84
85 /* power management callbacks */
86 .is_railgated = nvgpu_pci_tegra_is_railgated,
87
88 .default_big_page_size = SZ_64K,
89
90 .ch_wdt_timeout_ms = 7000,
91
92 .has_ce = true,
93
94 .vidmem_is_vidmem = true,
95 .vbios_min_version = 0x86062d00,
96 },
97 { /* DEVICE=0x1c37 */
98 /* ptimer src frequency in hz */
99 .ptimer_src_freq = 31250000,
100
101 .probe = nvgpu_pci_tegra_probe,
102 .remove = nvgpu_pci_tegra_remove,
65 103
66#define NVGPU_PCI_ENABLE_BLCG BIT(0) 104 /* power management configuration */
67#define NVGPU_PCI_ENABLE_SLCG BIT(1) 105 .railgate_delay = 500,
68#define NVGPU_PCI_ENABLE_ELCG BIT(2) 106 .can_railgate = false,
107 .can_elpg = false,
108 .enable_elcg = true,
109 .enable_slcg = true,
110 .enable_blcg = true,
111
112 /* power management callbacks */
113 .is_railgated = nvgpu_pci_tegra_is_railgated,
114
115 .default_big_page_size = SZ_64K,
116
117 .ch_wdt_timeout_ms = 7000,
118
119 .has_ce = true,
120
121 .vidmem_is_vidmem = true,
122 .vbios_min_version = 0x86063000,
123 }
124};
69 125
70static struct pci_device_id nvgpu_pci_table[] = { 126static struct pci_device_id nvgpu_pci_table[] = {
71 { 127 {
72 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c35), 128 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c35),
73 .class = PCI_BASE_CLASS_DISPLAY << 16, 129 .class = PCI_BASE_CLASS_DISPLAY << 16,
74 .class_mask = 0xff << 16, 130 .class_mask = 0xff << 16,
75 .driver_data = NVGPU_PCI_ENABLE_BLCG | 131 .driver_data = 0,
76 NVGPU_PCI_ENABLE_SLCG,
77 }, 132 },
78 { 133 {
79 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c36), 134 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c36),
80 .class = PCI_BASE_CLASS_DISPLAY << 16, 135 .class = PCI_BASE_CLASS_DISPLAY << 16,
81 .class_mask = 0xff << 16, 136 .class_mask = 0xff << 16,
82 .driver_data = NVGPU_PCI_ENABLE_BLCG | 137 .driver_data = 1,
83 NVGPU_PCI_ENABLE_SLCG |
84 NVGPU_PCI_ENABLE_ELCG,
85 }, 138 },
86 { 139 {
87 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c37), 140 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c37),
88 .class = PCI_BASE_CLASS_DISPLAY << 16, 141 .class = PCI_BASE_CLASS_DISPLAY << 16,
89 .class_mask = 0xff << 16, 142 .class_mask = 0xff << 16,
90 .driver_data = NVGPU_PCI_ENABLE_BLCG | 143 .driver_data = 2,
91 NVGPU_PCI_ENABLE_SLCG |
92 NVGPU_PCI_ENABLE_ELCG,
93 }, 144 },
94 {} 145 {}
95}; 146};
@@ -202,11 +253,18 @@ static int nvgpu_pci_pm_init(struct device *dev)
202static int nvgpu_pci_probe(struct pci_dev *pdev, 253static int nvgpu_pci_probe(struct pci_dev *pdev,
203 const struct pci_device_id *pent) 254 const struct pci_device_id *pent)
204{ 255{
205 struct gk20a_platform *platform = &nvgpu_pci_device; 256 struct gk20a_platform *platform = NULL;
206 struct gk20a *g; 257 struct gk20a *g;
207 int err; 258 int err;
208 char *nodefmt; 259 char *nodefmt;
209 260
261 /* make sure driver_data is a sane index */
262 if (pent->driver_data >= sizeof(nvgpu_pci_device) /
263 sizeof(nvgpu_pci_device[0])) {
264 return -EINVAL;
265 }
266
267 platform = &nvgpu_pci_device[pent->driver_data];
210 pci_set_drvdata(pdev, platform); 268 pci_set_drvdata(pdev, platform);
211 269
212 g = kzalloc(sizeof(struct gk20a), GFP_KERNEL); 270 g = kzalloc(sizeof(struct gk20a), GFP_KERNEL);
@@ -218,13 +276,6 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
218 platform->g = g; 276 platform->g = g;
219 g->dev = &pdev->dev; 277 g->dev = &pdev->dev;
220 278
221 if (pent->driver_data & NVGPU_PCI_ENABLE_BLCG)
222 platform->enable_blcg = true;
223 if (pent->driver_data & NVGPU_PCI_ENABLE_SLCG)
224 platform->enable_slcg = true;
225 if (pent->driver_data & NVGPU_PCI_ENABLE_ELCG)
226 platform->enable_elcg = true;
227
228 err = pci_enable_device(pdev); 279 err = pci_enable_device(pdev);
229 if (err) 280 if (err)
230 return err; 281 return err;