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-rw-r--r--drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c9
-rw-r--r--include/linux/tegra_vgpu.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
index 21fec478..749d6a15 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
@@ -56,6 +56,7 @@ static int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
56 struct gr_ctx_desc *gr_ctx; 56 struct gr_ctx_desc *gr_ctx;
57 u32 graphics_preempt_mode = 0; 57 u32 graphics_preempt_mode = 0;
58 u32 compute_preempt_mode = 0; 58 u32 compute_preempt_mode = 0;
59 struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
59 int err; 60 int err;
60 61
61 gk20a_dbg_fn(""); 62 gk20a_dbg_fn("");
@@ -71,6 +72,14 @@ static int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
71 if (flags & NVGPU_ALLOC_OBJ_FLAGS_CILP) 72 if (flags & NVGPU_ALLOC_OBJ_FLAGS_CILP)
72 compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; 73 compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP;
73 74
75 if (priv->constants.force_preempt_mode && !graphics_preempt_mode &&
76 !compute_preempt_mode) {
77 graphics_preempt_mode = PASCAL_A == class ?
78 NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP : 0;
79 compute_preempt_mode = PASCAL_COMPUTE_A == class ?
80 NVGPU_COMPUTE_PREEMPTION_MODE_CTA : 0;
81 }
82
74 if (graphics_preempt_mode || compute_preempt_mode) { 83 if (graphics_preempt_mode || compute_preempt_mode) {
75 if (g->ops.gr.set_ctxsw_preemption_mode) { 84 if (g->ops.gr.set_ctxsw_preemption_mode) {
76 err = g->ops.gr.set_ctxsw_preemption_mode(g, gr_ctx, vm, 85 err = g->ops.gr.set_ctxsw_preemption_mode(g, gr_ctx, vm,
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 3e3bbf58..c0964083 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -442,6 +442,7 @@ struct tegra_vgpu_constants_params {
442 */ 442 */
443 u16 gpc_tpc_mask[TEGRA_VGPU_MAX_GPC_COUNT]; 443 u16 gpc_tpc_mask[TEGRA_VGPU_MAX_GPC_COUNT];
444 u32 hwpm_ctx_size; 444 u32 hwpm_ctx_size;
445 u8 force_preempt_mode;
445}; 446};
446 447
447struct tegra_vgpu_channel_cyclestats_snapshot_params { 448struct tegra_vgpu_channel_cyclestats_snapshot_params {