diff options
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.c | 33 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_tsg.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 8 |
7 files changed, 61 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index 44f662cb..9a867bcb 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c | |||
@@ -21,6 +21,8 @@ | |||
21 | #include <linux/anon_inodes.h> | 21 | #include <linux/anon_inodes.h> |
22 | #include <linux/dma-buf.h> | 22 | #include <linux/dma-buf.h> |
23 | #include <linux/poll.h> | 23 | #include <linux/poll.h> |
24 | #include <uapi/linux/nvgpu.h> | ||
25 | #include <uapi/linux/nvgpu-t18x.h> | ||
24 | 26 | ||
25 | #include <nvgpu/semaphore.h> | 27 | #include <nvgpu/semaphore.h> |
26 | #include <nvgpu/timers.h> | 28 | #include <nvgpu/timers.h> |
@@ -689,12 +691,41 @@ static int gk20a_channel_get_event_data_from_id(struct channel_gk20a *ch, | |||
689 | } | 691 | } |
690 | } | 692 | } |
691 | 693 | ||
694 | /* | ||
695 | * Convert common event_id of the form NVGPU_EVENT_ID_* to Linux specific | ||
696 | * event_id of the form NVGPU_IOCTL_CHANNEL_EVENT_ID_* which is used in IOCTLs | ||
697 | */ | ||
698 | u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id) | ||
699 | { | ||
700 | switch (event_id) { | ||
701 | case NVGPU_EVENT_ID_BPT_INT: | ||
702 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT; | ||
703 | case NVGPU_EVENT_ID_BPT_PAUSE: | ||
704 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE; | ||
705 | case NVGPU_EVENT_ID_BLOCKING_SYNC: | ||
706 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC; | ||
707 | case NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED: | ||
708 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_STARTED; | ||
709 | case NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE: | ||
710 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE; | ||
711 | case NVGPU_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN: | ||
712 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN; | ||
713 | } | ||
714 | |||
715 | return NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX; | ||
716 | } | ||
717 | |||
692 | void gk20a_channel_event_id_post_event(struct channel_gk20a *ch, | 718 | void gk20a_channel_event_id_post_event(struct channel_gk20a *ch, |
693 | u32 event_id) | 719 | u32 __event_id) |
694 | { | 720 | { |
695 | struct gk20a_event_id_data *event_id_data; | 721 | struct gk20a_event_id_data *event_id_data; |
722 | u32 event_id; | ||
696 | int err = 0; | 723 | int err = 0; |
697 | 724 | ||
725 | event_id = nvgpu_event_id_to_ioctl_channel_event_id(__event_id); | ||
726 | if (event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX) | ||
727 | return; | ||
728 | |||
698 | err = gk20a_channel_get_event_data_from_id(ch, event_id, | 729 | err = gk20a_channel_get_event_data_from_id(ch, event_id, |
699 | &event_id_data); | 730 | &event_id_data); |
700 | if (err) | 731 | if (err) |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h index 1aac04aa..8cfce7e1 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h | |||
@@ -23,4 +23,5 @@ int gk20a_channel_open_ioctl(struct gk20a *g, | |||
23 | extern const struct file_operations gk20a_event_id_ops; | 23 | extern const struct file_operations gk20a_event_id_ops; |
24 | extern const struct file_operations gk20a_channel_ops; | 24 | extern const struct file_operations gk20a_channel_ops; |
25 | 25 | ||
26 | u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id); | ||
26 | #endif | 27 | #endif |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c index 2570886d..681a5e66 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c | |||
@@ -80,11 +80,16 @@ static int gk20a_tsg_get_event_data_from_id(struct tsg_gk20a *tsg, | |||
80 | } | 80 | } |
81 | 81 | ||
82 | void gk20a_tsg_event_id_post_event(struct tsg_gk20a *tsg, | 82 | void gk20a_tsg_event_id_post_event(struct tsg_gk20a *tsg, |
83 | int event_id) | 83 | int __event_id) |
84 | { | 84 | { |
85 | struct gk20a_event_id_data *event_id_data; | 85 | struct gk20a_event_id_data *event_id_data; |
86 | u32 event_id; | ||
86 | int err = 0; | 87 | int err = 0; |
87 | 88 | ||
89 | event_id = nvgpu_event_id_to_ioctl_channel_event_id(__event_id); | ||
90 | if (event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX) | ||
91 | return; | ||
92 | |||
88 | err = gk20a_tsg_get_event_data_from_id(tsg, event_id, | 93 | err = gk20a_tsg_get_event_data_from_id(tsg, event_id, |
89 | &event_id_data); | 94 | &event_id_data); |
90 | if (err) | 95 | if (err) |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index c938ba6b..805902eb 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -2395,10 +2395,10 @@ void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events) | |||
2395 | &g->fifo.tsg[c->tsgid]; | 2395 | &g->fifo.tsg[c->tsgid]; |
2396 | 2396 | ||
2397 | gk20a_tsg_event_id_post_event(tsg, | 2397 | gk20a_tsg_event_id_post_event(tsg, |
2398 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC); | 2398 | NVGPU_EVENT_ID_BLOCKING_SYNC); |
2399 | } else { | 2399 | } else { |
2400 | gk20a_channel_event_id_post_event(c, | 2400 | gk20a_channel_event_id_post_event(c, |
2401 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC); | 2401 | NVGPU_EVENT_ID_BLOCKING_SYNC); |
2402 | } | 2402 | } |
2403 | } | 2403 | } |
2404 | /* | 2404 | /* |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 2a20c2d9..f7db1ffa 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5275,10 +5275,10 @@ static int gk20a_gr_handle_semaphore_pending(struct gk20a *g, | |||
5275 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; | 5275 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; |
5276 | 5276 | ||
5277 | gk20a_tsg_event_id_post_event(tsg, | 5277 | gk20a_tsg_event_id_post_event(tsg, |
5278 | NVGPU_IOCTL_CHANNEL_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN); | 5278 | NVGPU_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN); |
5279 | } else { | 5279 | } else { |
5280 | gk20a_channel_event_id_post_event(ch, | 5280 | gk20a_channel_event_id_post_event(ch, |
5281 | NVGPU_IOCTL_CHANNEL_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN); | 5281 | NVGPU_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN); |
5282 | } | 5282 | } |
5283 | 5283 | ||
5284 | nvgpu_cond_broadcast(&ch->semaphore_wq); | 5284 | nvgpu_cond_broadcast(&ch->semaphore_wq); |
@@ -5824,10 +5824,10 @@ static int gk20a_gr_post_bpt_events(struct gk20a *g, struct channel_gk20a *ch, | |||
5824 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; | 5824 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; |
5825 | 5825 | ||
5826 | gk20a_tsg_event_id_post_event(tsg, | 5826 | gk20a_tsg_event_id_post_event(tsg, |
5827 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT); | 5827 | NVGPU_EVENT_ID_BPT_INT); |
5828 | } else { | 5828 | } else { |
5829 | gk20a_channel_event_id_post_event(ch, | 5829 | gk20a_channel_event_id_post_event(ch, |
5830 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT); | 5830 | NVGPU_EVENT_ID_BPT_INT); |
5831 | } | 5831 | } |
5832 | } | 5832 | } |
5833 | if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f()) { | 5833 | if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f()) { |
@@ -5835,10 +5835,10 @@ static int gk20a_gr_post_bpt_events(struct gk20a *g, struct channel_gk20a *ch, | |||
5835 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; | 5835 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; |
5836 | 5836 | ||
5837 | gk20a_tsg_event_id_post_event(tsg, | 5837 | gk20a_tsg_event_id_post_event(tsg, |
5838 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE); | 5838 | NVGPU_EVENT_ID_BPT_PAUSE); |
5839 | } else { | 5839 | } else { |
5840 | gk20a_channel_event_id_post_event(ch, | 5840 | gk20a_channel_event_id_post_event(ch, |
5841 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE); | 5841 | NVGPU_EVENT_ID_BPT_PAUSE); |
5842 | } | 5842 | } |
5843 | } | 5843 | } |
5844 | 5844 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 8a044728..d411a2fa 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -124,6 +124,16 @@ enum { | |||
124 | BLCG_AUTO /* clk will run when non-idle, standard blcg mode */ | 124 | BLCG_AUTO /* clk will run when non-idle, standard blcg mode */ |
125 | }; | 125 | }; |
126 | 126 | ||
127 | enum { | ||
128 | NVGPU_EVENT_ID_BPT_INT = 0, | ||
129 | NVGPU_EVENT_ID_BPT_PAUSE, | ||
130 | NVGPU_EVENT_ID_BLOCKING_SYNC, | ||
131 | NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED, | ||
132 | NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE, | ||
133 | NVGPU_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN, | ||
134 | NVGPU_EVENT_ID_MAX, | ||
135 | }; | ||
136 | |||
127 | #ifndef GR_GO_IDLE_BUNDLE | 137 | #ifndef GR_GO_IDLE_BUNDLE |
128 | #define GR_GO_IDLE_BUNDLE 0x0000e100 /* --V-B */ | 138 | #define GR_GO_IDLE_BUNDLE 0x0000e100 /* --V-B */ |
129 | #endif | 139 | #endif |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 78be072f..f1180750 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -1779,10 +1779,10 @@ int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g, | |||
1779 | struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid]; | 1779 | struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid]; |
1780 | 1780 | ||
1781 | gk20a_tsg_event_id_post_event(tsg, | 1781 | gk20a_tsg_event_id_post_event(tsg, |
1782 | NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_STARTED); | 1782 | NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED); |
1783 | } else { | 1783 | } else { |
1784 | gk20a_channel_event_id_post_event(fault_ch, | 1784 | gk20a_channel_event_id_post_event(fault_ch, |
1785 | NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_STARTED); | 1785 | NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED); |
1786 | } | 1786 | } |
1787 | 1787 | ||
1788 | return 0; | 1788 | return 0; |
@@ -1990,10 +1990,10 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g, | |||
1990 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; | 1990 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; |
1991 | 1991 | ||
1992 | gk20a_tsg_event_id_post_event(tsg, | 1992 | gk20a_tsg_event_id_post_event(tsg, |
1993 | NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE); | 1993 | NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE); |
1994 | } else { | 1994 | } else { |
1995 | gk20a_channel_event_id_post_event(ch, | 1995 | gk20a_channel_event_id_post_event(ch, |
1996 | NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE); | 1996 | NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE); |
1997 | } | 1997 | } |
1998 | 1998 | ||
1999 | gk20a_channel_put(ch); | 1999 | gk20a_channel_put(ch); |