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-rw-r--r--drivers/gpu/nvgpu/gv100/acr_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/flcn_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/gr_ctx_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/gr_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/hal_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/pmu_gv100.h6
-rw-r--r--drivers/gpu/nvgpu/gv100/regops_gv100.h6
7 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/nvgpu/gv100/acr_gv100.h b/drivers/gpu/nvgpu/gv100/acr_gv100.h
index e5e7c454..f77e62a3 100644
--- a/drivers/gpu/nvgpu/gv100/acr_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/acr_gv100.h
@@ -20,10 +20,10 @@
20 * DEALINGS IN THE SOFTWARE. 20 * DEALINGS IN THE SOFTWARE.
21 */ 21 */
22 22
23#ifndef _NVGPU_ACR_GV100_H_ 23#ifndef NVGPU_ACR_GV100_H
24#define _NVGPU_ACR_GV100_H_ 24#define NVGPU_ACR_GV100_H
25 25
26#define GV100_FECS_UCODE_SIG "gv100/fecs_sig.bin" 26#define GV100_FECS_UCODE_SIG "gv100/fecs_sig.bin"
27#define GV100_GPCCS_UCODE_SIG "gv100/gpccs_sig.bin" 27#define GV100_GPCCS_UCODE_SIG "gv100/gpccs_sig.bin"
28 28
29#endif 29#endif /* NVGPU_ACR_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/flcn_gv100.h b/drivers/gpu/nvgpu/gv100/flcn_gv100.h
index 9207519a..f3116058 100644
--- a/drivers/gpu/nvgpu/gv100/flcn_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/flcn_gv100.h
@@ -19,9 +19,9 @@
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE. 20 * DEALINGS IN THE SOFTWARE.
21 */ 21 */
22#ifndef __FLCN_GV100_H__ 22#ifndef NVGPU_FLCN_GV100_H
23#define __FLCN_GV100_H__ 23#define NVGPU_FLCN_GV100_H
24 24
25int gv100_falcon_hal_sw_init(struct nvgpu_falcon *flcn); 25int gv100_falcon_hal_sw_init(struct nvgpu_falcon *flcn);
26 26
27#endif /* __FLCN_GV100_H__ */ 27#endif /* NVGPU_FLCN_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/gr_ctx_gv100.h b/drivers/gpu/nvgpu/gv100/gr_ctx_gv100.h
index 649a6b21..54991241 100644
--- a/drivers/gpu/nvgpu/gv100/gr_ctx_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/gr_ctx_gv100.h
@@ -19,8 +19,8 @@
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE. 20 * DEALINGS IN THE SOFTWARE.
21 */ 21 */
22#ifndef __GR_CTX_GV100_H__ 22#ifndef NVGPU_GR_CTX_GV100_H
23#define __GR_CTX_GV100_H__ 23#define NVGPU_GR_CTX_GV100_H
24 24
25#include "gk20a/gr_ctx_gk20a.h" 25#include "gk20a/gr_ctx_gk20a.h"
26 26
@@ -30,4 +30,4 @@
30int gr_gv100_get_netlist_name(struct gk20a *g, int index, char *name); 30int gr_gv100_get_netlist_name(struct gk20a *g, int index, char *name);
31bool gr_gv100_is_firmware_defined(void); 31bool gr_gv100_is_firmware_defined(void);
32 32
33#endif /*__GR_CTX_GV100_H__*/ 33#endif /* NVGPU_GR_CTX_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.h b/drivers/gpu/nvgpu/gv100/gr_gv100.h
index 6d6b4170..aae87f09 100644
--- a/drivers/gpu/nvgpu/gv100/gr_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/gr_gv100.h
@@ -22,8 +22,8 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#ifndef _NVGPU_GR_GV100_H_ 25#ifndef NVGPU_GR_GV100_H
26#define _NVGPU_GR_GV100_H_ 26#define NVGPU_GR_GV100_H
27 27
28void gr_gv100_bundle_cb_defaults(struct gk20a *g); 28void gr_gv100_bundle_cb_defaults(struct gk20a *g);
29void gr_gv100_cb_size_default(struct gk20a *g); 29void gr_gv100_cb_size_default(struct gk20a *g);
@@ -48,4 +48,4 @@ void gr_gv100_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr,
48 u32 *priv_addr_table, u32 *t); 48 u32 *priv_addr_table, u32 *t);
49u32 gr_gv100_get_hw_accessor_stream_out_mode(void); 49u32 gr_gv100_get_hw_accessor_stream_out_mode(void);
50void gr_gv100_init_hwpm_pmm_register(struct gk20a *g); 50void gr_gv100_init_hwpm_pmm_register(struct gk20a *g);
51#endif 51#endif /* NVGPU_GR_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.h b/drivers/gpu/nvgpu/gv100/hal_gv100.h
index 7564947e..a4b29541 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.h
@@ -22,11 +22,11 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#ifndef _NVGPU_HAL_GV100_H 25#ifndef NVGPU_HAL_GV100_H
26#define _NVGPU_HAL_GV100_H 26#define NVGPU_HAL_GV100_H
27 27
28struct gk20a; 28struct gk20a;
29 29
30int gv100_init_hal(struct gk20a *gops); 30int gv100_init_hal(struct gk20a *gops);
31 31
32#endif 32#endif /* NVGPU_HAL_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/pmu_gv100.h b/drivers/gpu/nvgpu/gv100/pmu_gv100.h
index 4c8b3541..9e7672eb 100644
--- a/drivers/gpu/nvgpu/gv100/pmu_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/pmu_gv100.h
@@ -22,12 +22,12 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#ifndef __PMU_GV100_H_ 25#ifndef NVGPU_PMU_GV100_H
26#define __PMU_GV100_H_ 26#define NVGPU_PMU_GV100_H
27 27
28struct gk20a; 28struct gk20a;
29 29
30int gv100_pmu_init_acr(struct gk20a *g); 30int gv100_pmu_init_acr(struct gk20a *g);
31int gv100_load_falcon_ucode(struct gk20a *g, u32 falconidmask); 31int gv100_load_falcon_ucode(struct gk20a *g, u32 falconidmask);
32 32
33#endif /*__PMU_GV100_H_*/ 33#endif /* NVGPU_PMU_GV100_H */
diff --git a/drivers/gpu/nvgpu/gv100/regops_gv100.h b/drivers/gpu/nvgpu/gv100/regops_gv100.h
index 4abfeaac..14c39235 100644
--- a/drivers/gpu/nvgpu/gv100/regops_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/regops_gv100.h
@@ -22,8 +22,8 @@
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE. 23 * DEALINGS IN THE SOFTWARE.
24 */ 24 */
25#ifndef __REGOPS_GV100_H_ 25#ifndef NVGPU_REGOPS_GV100_H
26#define __REGOPS_GV100_H_ 26#define NVGPU_REGOPS_GV100_H
27 27
28const struct regop_offset_range *gv100_get_global_whitelist_ranges(void); 28const struct regop_offset_range *gv100_get_global_whitelist_ranges(void);
29u64 gv100_get_global_whitelist_ranges_count(void); 29u64 gv100_get_global_whitelist_ranges_count(void);
@@ -39,4 +39,4 @@ const struct regop_offset_range *gv100_get_qctl_whitelist_ranges(void);
39u64 gv100_get_qctl_whitelist_ranges_count(void); 39u64 gv100_get_qctl_whitelist_ranges_count(void);
40int gv100_apply_smpc_war(struct dbg_session_gk20a *dbg_s); 40int gv100_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
41 41
42#endif /* __REGOPS_GV11B_H_ */ 42#endif /* NVGPU_REGOPS_GV100_H */