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-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c119
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.h1
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c1
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c1
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c1
-rw-r--r--drivers/gpu/nvgpu/gv100/hal_gv100.c1
-rw-r--r--drivers/gpu/nvgpu/gv11b/hal_gv11b.c1
-rw-r--r--drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c1
-rw-r--r--drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c1
10 files changed, 95 insertions, 33 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 576a7f81..fd7faa22 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -862,24 +862,27 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
862 return 0; 862 return 0;
863} 863}
864 864
865int gk20a_init_fifo_setup_sw(struct gk20a *g) 865int gk20a_init_fifo_setup_sw_common(struct gk20a *g)
866{ 866{
867 struct fifo_gk20a *f = &g->fifo; 867 struct fifo_gk20a *f = &g->fifo;
868 unsigned int chid, i; 868 unsigned int chid, i;
869 int err = 0; 869 int err = 0;
870 u64 userd_base;
871 870
872 gk20a_dbg_fn(""); 871 gk20a_dbg_fn("");
873 872
874 if (f->sw_ready) {
875 gk20a_dbg_fn("skip init");
876 return 0;
877 }
878
879 f->g = g; 873 f->g = g;
880 874
881 nvgpu_mutex_init(&f->intr.isr.mutex); 875 err = nvgpu_mutex_init(&f->intr.isr.mutex);
882 nvgpu_mutex_init(&f->gr_reset_mutex); 876 if (err) {
877 nvgpu_err(g, "failed to init isr.mutex");
878 return err;
879 }
880
881 err = nvgpu_mutex_init(&f->gr_reset_mutex);
882 if (err) {
883 nvgpu_err(g, "failed to init gr_reset_mutex");
884 return err;
885 }
883 886
884 g->ops.fifo.init_pbdma_intr_descs(f); /* just filling in data/tables */ 887 g->ops.fifo.init_pbdma_intr_descs(f); /* just filling in data/tables */
885 888
@@ -914,7 +917,73 @@ int gk20a_init_fifo_setup_sw(struct gk20a *g)
914 init_runlist(g, f); 917 init_runlist(g, f);
915 918
916 nvgpu_init_list_node(&f->free_chs); 919 nvgpu_init_list_node(&f->free_chs);
917 nvgpu_mutex_init(&f->free_chs_mutex); 920
921 err = nvgpu_mutex_init(&f->free_chs_mutex);
922 if (err) {
923 nvgpu_err(g, "failed to init free_chs_mutex");
924 goto clean_up;
925 }
926
927 for (chid = 0; chid < f->num_channels; chid++) {
928 gk20a_init_channel_support(g, chid);
929 gk20a_init_tsg_support(g, chid);
930 }
931
932 err = nvgpu_mutex_init(&f->tsg_inuse_mutex);
933 if (err) {
934 nvgpu_err(g, "failed to init tsg_inuse_mutex");
935 goto clean_up;
936 }
937
938 f->remove_support = gk20a_remove_fifo_support;
939
940 f->deferred_reset_pending = false;
941
942 err = nvgpu_mutex_init(&f->deferred_reset_mutex);
943 if (err) {
944 nvgpu_err(g, "failed to init deferred_reset_mutex");
945 goto clean_up;
946 }
947
948 gk20a_dbg_fn("done");
949 return 0;
950
951clean_up:
952 nvgpu_err(g, "fail");
953
954 nvgpu_vfree(g, f->channel);
955 f->channel = NULL;
956 nvgpu_vfree(g, f->tsg);
957 f->tsg = NULL;
958 nvgpu_kfree(g, f->pbdma_map);
959 f->pbdma_map = NULL;
960 nvgpu_kfree(g, f->engine_info);
961 f->engine_info = NULL;
962 nvgpu_kfree(g, f->active_engines_list);
963 f->active_engines_list = NULL;
964
965 return err;
966}
967
968int gk20a_init_fifo_setup_sw(struct gk20a *g)
969{
970 struct fifo_gk20a *f = &g->fifo;
971 unsigned int chid;
972 u64 userd_base;
973 int err = 0;
974
975 gk20a_dbg_fn("");
976
977 if (f->sw_ready) {
978 gk20a_dbg_fn("skip init");
979 return 0;
980 }
981
982 err = gk20a_init_fifo_setup_sw_common(g);
983 if (err) {
984 nvgpu_err(g, "fail: err: %d", err);
985 return err;
986 }
918 987
919 if (g->ops.mm.is_bar1_supported(g)) 988 if (g->ops.mm.is_bar1_supported(g))
920 err = nvgpu_dma_alloc_map_sys(g->mm.bar1.vm, 989 err = nvgpu_dma_alloc_map_sys(g->mm.bar1.vm,
@@ -936,18 +1005,11 @@ int gk20a_init_fifo_setup_sw(struct gk20a *g)
936 chid * f->userd_entry_size; 1005 chid * f->userd_entry_size;
937 f->channel[chid].userd_gpu_va = 1006 f->channel[chid].userd_gpu_va =
938 f->userd.gpu_va + chid * f->userd_entry_size; 1007 f->userd.gpu_va + chid * f->userd_entry_size;
939 gk20a_init_channel_support(g, chid);
940 gk20a_init_tsg_support(g, chid);
941 } 1008 }
942 nvgpu_mutex_init(&f->tsg_inuse_mutex);
943 1009
944 err = nvgpu_channel_worker_init(g); 1010 err = nvgpu_channel_worker_init(g);
945 if (err) 1011 if (err)
946 goto clean_up; 1012 goto clean_up;
947 f->remove_support = gk20a_remove_fifo_support;
948
949 f->deferred_reset_pending = false;
950 nvgpu_mutex_init(&f->deferred_reset_mutex);
951 1013
952 f->sw_ready = true; 1014 f->sw_ready = true;
953 1015
@@ -956,21 +1018,12 @@ int gk20a_init_fifo_setup_sw(struct gk20a *g)
956 1018
957clean_up: 1019clean_up:
958 gk20a_dbg_fn("fail"); 1020 gk20a_dbg_fn("fail");
959 if (g->ops.mm.is_bar1_supported(g)) 1021 if (nvgpu_mem_is_valid(&f->userd)) {
960 nvgpu_dma_unmap_free(g->mm.bar1.vm, &f->userd); 1022 if (g->ops.mm.is_bar1_supported(g))
961 else 1023 nvgpu_dma_unmap_free(g->mm.bar1.vm, &f->userd);
962 nvgpu_dma_free(g, &f->userd); 1024 else
963 1025 nvgpu_dma_free(g, &f->userd);
964 nvgpu_vfree(g, f->channel); 1026 }
965 f->channel = NULL;
966 nvgpu_vfree(g, f->tsg);
967 f->tsg = NULL;
968 nvgpu_kfree(g, f->pbdma_map);
969 f->pbdma_map = NULL;
970 nvgpu_kfree(g, f->engine_info);
971 f->engine_info = NULL;
972 nvgpu_kfree(g, f->active_engines_list);
973 f->active_engines_list = NULL;
974 1027
975 return err; 1028 return err;
976} 1029}
@@ -1049,7 +1102,7 @@ int gk20a_init_fifo_support(struct gk20a *g)
1049{ 1102{
1050 u32 err; 1103 u32 err;
1051 1104
1052 err = gk20a_init_fifo_setup_sw(g); 1105 err = g->ops.fifo.setup_sw(g);
1053 if (err) 1106 if (err)
1054 return err; 1107 return err;
1055 1108
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index e2febbf8..12ef5f69 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -386,6 +386,7 @@ u32 *gk20a_runlist_construct_locked(struct fifo_gk20a *f,
386 bool prev_empty, 386 bool prev_empty,
387 u32 *entries_left); 387 u32 *entries_left);
388int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id); 388int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id);
389int gk20a_init_fifo_setup_sw_common(struct gk20a *g);
389int gk20a_init_fifo_setup_sw(struct gk20a *g); 390int gk20a_init_fifo_setup_sw(struct gk20a *g);
390void gk20a_fifo_handle_runlist_event(struct gk20a *g); 391void gk20a_fifo_handle_runlist_event(struct gk20a *g);
391bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, 392bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id,
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index e8cfaf13..b5ebb9ba 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -532,6 +532,7 @@ struct gpu_ops {
532 void (*post_events)(struct channel_gk20a *ch); 532 void (*post_events)(struct channel_gk20a *ch);
533 } debugger; 533 } debugger;
534 struct { 534 struct {
535 int (*setup_sw)(struct gk20a *g);
535 int (*init_fifo_setup_hw)(struct gk20a *g); 536 int (*init_fifo_setup_hw)(struct gk20a *g);
536 void (*bind_channel)(struct channel_gk20a *ch_gk20a); 537 void (*bind_channel)(struct channel_gk20a *ch_gk20a);
537 void (*unbind_channel)(struct channel_gk20a *ch_gk20a); 538 void (*unbind_channel)(struct channel_gk20a *ch_gk20a);
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 0aac68ff..82e8826e 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -445,6 +445,7 @@ static const struct gpu_ops gm20b_ops = {
445 .channel_suspend = gk20a_channel_suspend, 445 .channel_suspend = gk20a_channel_suspend,
446 .channel_resume = gk20a_channel_resume, 446 .channel_resume = gk20a_channel_resume,
447 .set_error_notifier = nvgpu_set_error_notifier, 447 .set_error_notifier = nvgpu_set_error_notifier,
448 .setup_sw = gk20a_init_fifo_setup_sw,
448#ifdef CONFIG_TEGRA_GK20A_NVHOST 449#ifdef CONFIG_TEGRA_GK20A_NVHOST
449 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, 450 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
450 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf, 451 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index e77316d6..cad8ed97 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -506,6 +506,7 @@ static const struct gpu_ops gp106_ops = {
506 .channel_suspend = gk20a_channel_suspend, 506 .channel_suspend = gk20a_channel_suspend,
507 .channel_resume = gk20a_channel_resume, 507 .channel_resume = gk20a_channel_resume,
508 .set_error_notifier = nvgpu_set_error_notifier, 508 .set_error_notifier = nvgpu_set_error_notifier,
509 .setup_sw = gk20a_init_fifo_setup_sw,
509#ifdef CONFIG_TEGRA_GK20A_NVHOST 510#ifdef CONFIG_TEGRA_GK20A_NVHOST
510 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, 511 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
511 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf, 512 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 78633e9b..a03ad28a 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -477,6 +477,7 @@ static const struct gpu_ops gp10b_ops = {
477 .channel_suspend = gk20a_channel_suspend, 477 .channel_suspend = gk20a_channel_suspend,
478 .channel_resume = gk20a_channel_resume, 478 .channel_resume = gk20a_channel_resume,
479 .set_error_notifier = nvgpu_set_error_notifier, 479 .set_error_notifier = nvgpu_set_error_notifier,
480 .setup_sw = gk20a_init_fifo_setup_sw,
480#ifdef CONFIG_TEGRA_GK20A_NVHOST 481#ifdef CONFIG_TEGRA_GK20A_NVHOST
481 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, 482 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
482 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf, 483 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index 45325469..e2fcbf08 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -518,6 +518,7 @@ static const struct gpu_ops gv100_ops = {
518 .channel_suspend = gk20a_channel_suspend, 518 .channel_suspend = gk20a_channel_suspend,
519 .channel_resume = gk20a_channel_resume, 519 .channel_resume = gk20a_channel_resume,
520 .set_error_notifier = nvgpu_set_error_notifier, 520 .set_error_notifier = nvgpu_set_error_notifier,
521 .setup_sw = gk20a_init_fifo_setup_sw,
521#ifdef CONFIG_TEGRA_GK20A_NVHOST 522#ifdef CONFIG_TEGRA_GK20A_NVHOST
522 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, 523 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
523 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf, 524 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 60effbf2..2d6dc9b0 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -535,6 +535,7 @@ static const struct gpu_ops gv11b_ops = {
535 .channel_suspend = gk20a_channel_suspend, 535 .channel_suspend = gk20a_channel_suspend,
536 .channel_resume = gk20a_channel_resume, 536 .channel_resume = gk20a_channel_resume,
537 .set_error_notifier = nvgpu_set_error_notifier, 537 .set_error_notifier = nvgpu_set_error_notifier,
538 .setup_sw = gk20a_init_fifo_setup_sw,
538#ifdef CONFIG_TEGRA_GK20A_NVHOST 539#ifdef CONFIG_TEGRA_GK20A_NVHOST
539 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, 540 .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
540 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf, 541 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
index 8b9f04dd..1da114ac 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -351,6 +351,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
351 .channel_suspend = gk20a_channel_suspend, 351 .channel_suspend = gk20a_channel_suspend,
352 .channel_resume = gk20a_channel_resume, 352 .channel_resume = gk20a_channel_resume,
353 .set_error_notifier = nvgpu_set_error_notifier, 353 .set_error_notifier = nvgpu_set_error_notifier,
354 .setup_sw = gk20a_init_fifo_setup_sw,
354#ifdef CONFIG_TEGRA_GK20A_NVHOST 355#ifdef CONFIG_TEGRA_GK20A_NVHOST
355 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf, 356 .alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
356 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf, 357 .free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index 32edbd21..cfbdbbad 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -394,6 +394,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
394 .channel_suspend = gk20a_channel_suspend, 394 .channel_suspend = gk20a_channel_suspend,
395 .channel_resume = gk20a_channel_resume, 395 .channel_resume = gk20a_channel_resume,
396 .set_error_notifier = nvgpu_set_error_notifier, 396 .set_error_notifier = nvgpu_set_error_notifier,
397 .setup_sw = gk20a_init_fifo_setup_sw,
397#ifdef CONFIG_TEGRA_GK20A_NVHOST 398#ifdef CONFIG_TEGRA_GK20A_NVHOST
398 .alloc_syncpt_buf = vgpu_gv11b_fifo_alloc_syncpt_buf, 399 .alloc_syncpt_buf = vgpu_gv11b_fifo_alloc_syncpt_buf,
399 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf, 400 .free_syncpt_buf = gv11b_fifo_free_syncpt_buf,