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-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_tsg.c1
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c44
-rw-r--r--drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c1
-rw-r--r--drivers/gpu/nvgpu/gk20a/fence_gk20a.c32
-rw-r--r--drivers/gpu/nvgpu/gk20a/fence_gk20a.h4
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c6
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c18
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c30
-rw-r--r--drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c44
-rw-r--r--drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c31
11 files changed, 78 insertions, 134 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
index 25805ea0..d530fff6 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
@@ -18,7 +18,6 @@
18#include <linux/file.h> 18#include <linux/file.h>
19#include <linux/cdev.h> 19#include <linux/cdev.h>
20#include <linux/uaccess.h> 20#include <linux/uaccess.h>
21#include <linux/nvhost.h>
22#include <uapi/linux/nvgpu.h> 21#include <uapi/linux/nvgpu.h>
23#include <linux/anon_inodes.h> 22#include <linux/anon_inodes.h>
24 23
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
index 07157dc9..3d313ce8 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
@@ -23,6 +23,7 @@
23#include <nvgpu/atomic.h> 23#include <nvgpu/atomic.h>
24#include <nvgpu/bug.h> 24#include <nvgpu/bug.h>
25#include <nvgpu/list.h> 25#include <nvgpu/list.h>
26#include <nvgpu/nvhost.h>
26 27
27#include "channel_sync_gk20a.h" 28#include "channel_sync_gk20a.h"
28#include "gk20a.h" 29#include "gk20a.h"
@@ -35,12 +36,11 @@
35#endif 36#endif
36 37
37#ifdef CONFIG_TEGRA_GK20A_NVHOST 38#ifdef CONFIG_TEGRA_GK20A_NVHOST
38#include <linux/nvhost.h>
39 39
40struct gk20a_channel_syncpt { 40struct gk20a_channel_syncpt {
41 struct gk20a_channel_sync ops; 41 struct gk20a_channel_sync ops;
42 struct channel_gk20a *c; 42 struct channel_gk20a *c;
43 struct platform_device *host1x_pdev; 43 struct nvgpu_nvhost_dev *nvhost_dev;
44 u32 id; 44 u32 id;
45 struct nvgpu_mem syncpt_buf; 45 struct nvgpu_mem syncpt_buf;
46}; 46};
@@ -54,12 +54,12 @@ static int gk20a_channel_syncpt_wait_syncpt(struct gk20a_channel_sync *s,
54 struct channel_gk20a *c = sp->c; 54 struct channel_gk20a *c = sp->c;
55 int err = 0; 55 int err = 0;
56 56
57 if (!nvhost_syncpt_is_valid_pt_ext(sp->host1x_pdev, id)) { 57 if (!nvgpu_nvhost_syncpt_is_valid_pt_ext(sp->nvhost_dev, id)) {
58 nvgpu_warn(c->g, "invalid wait id in gpfifo submit, elided"); 58 nvgpu_warn(c->g, "invalid wait id in gpfifo submit, elided");
59 return 0; 59 return 0;
60 } 60 }
61 61
62 if (nvhost_syncpt_is_expired_ext(sp->host1x_pdev, id, thresh)) 62 if (nvgpu_nvhost_syncpt_is_expired_ext(sp->nvhost_dev, id, thresh))
63 return 0; 63 return 0;
64 64
65 err = gk20a_channel_alloc_priv_cmdbuf(c, 65 err = gk20a_channel_alloc_priv_cmdbuf(c,
@@ -94,7 +94,7 @@ static int gk20a_channel_syncpt_wait_fd(struct gk20a_channel_sync *s, int fd,
94 int err = 0; 94 int err = 0;
95 u32 wait_cmd_size = 0; 95 u32 wait_cmd_size = 0;
96 96
97 sync_fence = nvhost_sync_fdget(fd); 97 sync_fence = nvgpu_nvhost_sync_fdget(fd);
98 if (!sync_fence) 98 if (!sync_fence)
99 return -EINVAL; 99 return -EINVAL;
100 100
@@ -105,9 +105,9 @@ static int gk20a_channel_syncpt_wait_fd(struct gk20a_channel_sync *s, int fd,
105 for (i = 0; i < sync_fence->num_fences; i++) { 105 for (i = 0; i < sync_fence->num_fences; i++) {
106 pt = sync_pt_from_fence(sync_fence->cbs[i].sync_pt); 106 pt = sync_pt_from_fence(sync_fence->cbs[i].sync_pt);
107#endif 107#endif
108 wait_id = nvhost_sync_pt_id(pt); 108 wait_id = nvgpu_nvhost_sync_pt_id(pt);
109 if (!wait_id || !nvhost_syncpt_is_valid_pt_ext(sp->host1x_pdev, 109 if (!wait_id || !nvgpu_nvhost_syncpt_is_valid_pt_ext(
110 wait_id)) { 110 sp->nvhost_dev, wait_id)) {
111 sync_fence_put(sync_fence); 111 sync_fence_put(sync_fence);
112 return -EINVAL; 112 return -EINVAL;
113 } 113 }
@@ -117,7 +117,7 @@ static int gk20a_channel_syncpt_wait_fd(struct gk20a_channel_sync *s, int fd,
117 } 117 }
118#endif 118#endif
119 119
120 num_wait_cmds = nvhost_sync_num_pts(sync_fence); 120 num_wait_cmds = nvgpu_nvhost_sync_num_pts(sync_fence);
121 if (num_wait_cmds == 0) { 121 if (num_wait_cmds == 0) {
122 sync_fence_put(sync_fence); 122 sync_fence_put(sync_fence);
123 return 0; 123 return 0;
@@ -141,10 +141,10 @@ static int gk20a_channel_syncpt_wait_fd(struct gk20a_channel_sync *s, int fd,
141 struct fence *f = sync_fence->cbs[i].sync_pt; 141 struct fence *f = sync_fence->cbs[i].sync_pt;
142 struct sync_pt *pt = sync_pt_from_fence(f); 142 struct sync_pt *pt = sync_pt_from_fence(f);
143#endif 143#endif
144 u32 wait_id = nvhost_sync_pt_id(pt); 144 u32 wait_id = nvgpu_nvhost_sync_pt_id(pt);
145 u32 wait_value = nvhost_sync_pt_thresh(pt); 145 u32 wait_value = nvgpu_nvhost_sync_pt_thresh(pt);
146 146
147 if (nvhost_syncpt_is_expired_ext(sp->host1x_pdev, 147 if (nvgpu_nvhost_syncpt_is_expired_ext(sp->nvhost_dev,
148 wait_id, wait_value)) { 148 wait_id, wait_value)) {
149 nvgpu_memset(c->g, wait_cmd->mem, 149 nvgpu_memset(c->g, wait_cmd->mem,
150 (wait_cmd->off + i * wait_cmd_size) * sizeof(u32), 150 (wait_cmd->off + i * wait_cmd_size) * sizeof(u32),
@@ -206,7 +206,7 @@ static int __gk20a_channel_syncpt_incr(struct gk20a_channel_sync *s,
206 c->g->ops.fifo.add_syncpt_incr_cmd(c->g, wfi_cmd, 206 c->g->ops.fifo.add_syncpt_incr_cmd(c->g, wfi_cmd,
207 incr_cmd, sp->id, sp->syncpt_buf.gpu_va); 207 incr_cmd, sp->id, sp->syncpt_buf.gpu_va);
208 208
209 thresh = nvhost_syncpt_incr_max_ext(sp->host1x_pdev, sp->id, 2); 209 thresh = nvgpu_nvhost_syncpt_incr_max_ext(sp->nvhost_dev, sp->id, 2);
210 210
211 if (register_irq) { 211 if (register_irq) {
212 struct channel_gk20a *referenced = gk20a_channel_get(c); 212 struct channel_gk20a *referenced = gk20a_channel_get(c);
@@ -217,8 +217,8 @@ static int __gk20a_channel_syncpt_incr(struct gk20a_channel_sync *s,
217 /* note: channel_put() is in 217 /* note: channel_put() is in
218 * gk20a_channel_syncpt_update() */ 218 * gk20a_channel_syncpt_update() */
219 219
220 err = nvhost_intr_register_notifier( 220 err = nvgpu_nvhost_intr_register_notifier(
221 sp->host1x_pdev, 221 sp->nvhost_dev,
222 sp->id, thresh, 222 sp->id, thresh,
223 gk20a_channel_syncpt_update, c); 223 gk20a_channel_syncpt_update, c);
224 if (err) 224 if (err)
@@ -234,7 +234,7 @@ static int __gk20a_channel_syncpt_incr(struct gk20a_channel_sync *s,
234 } 234 }
235 } 235 }
236 236
237 err = gk20a_fence_from_syncpt(fence, sp->host1x_pdev, sp->id, thresh, 237 err = gk20a_fence_from_syncpt(fence, sp->nvhost_dev, sp->id, thresh,
238 wfi_cmd, need_sync_fence); 238 wfi_cmd, need_sync_fence);
239 if (err) 239 if (err)
240 goto clean_up_priv_cmd; 240 goto clean_up_priv_cmd;
@@ -290,7 +290,7 @@ static void gk20a_channel_syncpt_set_min_eq_max(struct gk20a_channel_sync *s)
290{ 290{
291 struct gk20a_channel_syncpt *sp = 291 struct gk20a_channel_syncpt *sp =
292 container_of(s, struct gk20a_channel_syncpt, ops); 292 container_of(s, struct gk20a_channel_syncpt, ops);
293 nvhost_syncpt_set_min_eq_max_ext(sp->host1x_pdev, sp->id); 293 nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id);
294} 294}
295 295
296static void gk20a_channel_syncpt_signal_timeline( 296static void gk20a_channel_syncpt_signal_timeline(
@@ -314,8 +314,8 @@ static void gk20a_channel_syncpt_destroy(struct gk20a_channel_sync *s)
314 314
315 sp->c->g->ops.fifo.free_syncpt_buf(sp->c, &sp->syncpt_buf); 315 sp->c->g->ops.fifo.free_syncpt_buf(sp->c, &sp->syncpt_buf);
316 316
317 nvhost_syncpt_set_min_eq_max_ext(sp->host1x_pdev, sp->id); 317 nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id);
318 nvhost_syncpt_put_ref_ext(sp->host1x_pdev, sp->id); 318 nvgpu_nvhost_syncpt_put_ref_ext(sp->nvhost_dev, sp->id);
319 nvgpu_kfree(sp->c->g, sp); 319 nvgpu_kfree(sp->c->g, sp);
320} 320}
321 321
@@ -330,12 +330,12 @@ gk20a_channel_syncpt_create(struct channel_gk20a *c)
330 return NULL; 330 return NULL;
331 331
332 sp->c = c; 332 sp->c = c;
333 sp->host1x_pdev = c->g->host1x_dev; 333 sp->nvhost_dev = c->g->nvhost_dev;
334 334
335 snprintf(syncpt_name, sizeof(syncpt_name), 335 snprintf(syncpt_name, sizeof(syncpt_name),
336 "%s_%d", c->g->name, c->hw_chid); 336 "%s_%d", c->g->name, c->hw_chid);
337 337
338 sp->id = nvhost_get_syncpt_host_managed(sp->host1x_pdev, 338 sp->id = nvgpu_nvhost_get_syncpt_host_managed(sp->nvhost_dev,
339 c->hw_chid, syncpt_name); 339 c->hw_chid, syncpt_name);
340 if (!sp->id) { 340 if (!sp->id) {
341 nvgpu_kfree(c->g, sp); 341 nvgpu_kfree(c->g, sp);
@@ -346,7 +346,7 @@ gk20a_channel_syncpt_create(struct channel_gk20a *c)
346 sp->c->g->ops.fifo.alloc_syncpt_buf(sp->c, sp->id, 346 sp->c->g->ops.fifo.alloc_syncpt_buf(sp->c, sp->id,
347 &sp->syncpt_buf); 347 &sp->syncpt_buf);
348 348
349 nvhost_syncpt_set_min_eq_max_ext(sp->host1x_pdev, sp->id); 349 nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id);
350 350
351 atomic_set(&sp->ops.refcount, 0); 351 atomic_set(&sp->ops.refcount, 0);
352 sp->ops.wait_syncpt = gk20a_channel_syncpt_wait_syncpt; 352 sp->ops.wait_syncpt = gk20a_channel_syncpt_wait_syncpt;
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
index 4bfa041e..f018ef89 100644
--- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
@@ -20,7 +20,6 @@
20#include <linux/file.h> 20#include <linux/file.h>
21#include <linux/cdev.h> 21#include <linux/cdev.h>
22#include <linux/uaccess.h> 22#include <linux/uaccess.h>
23#include <linux/nvhost.h>
24#include <linux/dma-buf.h> 23#include <linux/dma-buf.h>
25#include <uapi/linux/nvgpu.h> 24#include <uapi/linux/nvgpu.h>
26 25
diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
index 7c5d33c7..5392e77c 100644
--- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c
@@ -21,6 +21,7 @@
21#include <nvgpu/semaphore.h> 21#include <nvgpu/semaphore.h>
22#include <nvgpu/kmem.h> 22#include <nvgpu/kmem.h>
23#include <nvgpu/soc.h> 23#include <nvgpu/soc.h>
24#include <nvgpu/nvhost.h>
24 25
25#include "gk20a.h" 26#include "gk20a.h"
26#include "channel_gk20a.h" 27#include "channel_gk20a.h"
@@ -30,11 +31,6 @@
30#include "../drivers/staging/android/sync.h" 31#include "../drivers/staging/android/sync.h"
31#endif 32#endif
32 33
33#ifdef CONFIG_TEGRA_GK20A_NVHOST
34#include <linux/nvhost.h>
35#include <linux/nvhost_ioctl.h>
36#endif
37
38struct gk20a_fence_ops { 34struct gk20a_fence_ops {
39 int (*wait)(struct gk20a_fence *, long timeout); 35 int (*wait)(struct gk20a_fence *, long timeout);
40 bool (*is_expired)(struct gk20a_fence *); 36 bool (*is_expired)(struct gk20a_fence *);
@@ -268,8 +264,8 @@ int gk20a_fence_from_semaphore(
268 264
269static int gk20a_syncpt_fence_wait(struct gk20a_fence *f, long timeout) 265static int gk20a_syncpt_fence_wait(struct gk20a_fence *f, long timeout)
270{ 266{
271 return nvhost_syncpt_wait_timeout_ext( 267 return nvgpu_nvhost_syncpt_wait_timeout_ext(
272 f->host1x_pdev, f->syncpt_id, f->syncpt_value, 268 f->nvhost_dev, f->syncpt_id, f->syncpt_value,
273 (u32)timeout, NULL, NULL); 269 (u32)timeout, NULL, NULL);
274} 270}
275 271
@@ -281,13 +277,14 @@ static bool gk20a_syncpt_fence_is_expired(struct gk20a_fence *f)
281 * syncpt value to be updated. For this case, we force a read 277 * syncpt value to be updated. For this case, we force a read
282 * of the value from HW, and then check for expiration. 278 * of the value from HW, and then check for expiration.
283 */ 279 */
284 if (!nvhost_syncpt_is_expired_ext(f->host1x_pdev, f->syncpt_id, 280 if (!nvgpu_nvhost_syncpt_is_expired_ext(f->nvhost_dev, f->syncpt_id,
285 f->syncpt_value)) { 281 f->syncpt_value)) {
286 u32 val; 282 u32 val;
287 283
288 if (!nvhost_syncpt_read_ext_check(f->host1x_pdev, 284 if (!nvgpu_nvhost_syncpt_read_ext_check(f->nvhost_dev,
289 f->syncpt_id, &val)) { 285 f->syncpt_id, &val)) {
290 return nvhost_syncpt_is_expired_ext(f->host1x_pdev, 286 return nvgpu_nvhost_syncpt_is_expired_ext(
287 f->nvhost_dev,
291 f->syncpt_id, f->syncpt_value); 288 f->syncpt_id, f->syncpt_value);
292 } 289 }
293 } 290 }
@@ -302,7 +299,7 @@ static const struct gk20a_fence_ops gk20a_syncpt_fence_ops = {
302 299
303int gk20a_fence_from_syncpt( 300int gk20a_fence_from_syncpt(
304 struct gk20a_fence *fence_out, 301 struct gk20a_fence *fence_out,
305 struct platform_device *host1x_pdev, 302 struct nvgpu_nvhost_dev *nvhost_dev,
306 u32 id, u32 value, bool wfi, 303 u32 id, u32 value, bool wfi,
307 bool need_sync_fence) 304 bool need_sync_fence)
308{ 305{
@@ -310,14 +307,9 @@ int gk20a_fence_from_syncpt(
310 struct sync_fence *sync_fence = NULL; 307 struct sync_fence *sync_fence = NULL;
311 308
312#ifdef CONFIG_SYNC 309#ifdef CONFIG_SYNC
313 struct nvhost_ctrl_sync_fence_info pt = {
314 .id = id,
315 .thresh = value
316 };
317
318 if (need_sync_fence) { 310 if (need_sync_fence) {
319 sync_fence = nvhost_sync_create_fence(host1x_pdev, &pt, 1, 311 sync_fence = nvgpu_nvhost_sync_create_fence(nvhost_dev,
320 "fence"); 312 id, value, 1, "fence");
321 if (IS_ERR(sync_fence)) 313 if (IS_ERR(sync_fence))
322 return -1; 314 return -1;
323 } 315 }
@@ -331,7 +323,7 @@ int gk20a_fence_from_syncpt(
331#endif 323#endif
332 return -EINVAL; 324 return -EINVAL;
333 } 325 }
334 f->host1x_pdev = host1x_pdev; 326 f->nvhost_dev = nvhost_dev;
335 f->syncpt_id = id; 327 f->syncpt_id = id;
336 f->syncpt_value = value; 328 f->syncpt_value = value;
337 329
@@ -344,7 +336,7 @@ int gk20a_fence_from_syncpt(
344#else 336#else
345int gk20a_fence_from_syncpt( 337int gk20a_fence_from_syncpt(
346 struct gk20a_fence *fence_out, 338 struct gk20a_fence *fence_out,
347 struct platform_device *host1x_pdev, 339 struct nvgpu_nvhost_dev *nvhost_dev,
348 u32 id, u32 value, bool wfi, 340 u32 id, u32 value, bool wfi,
349 bool need_sync_fence) 341 bool need_sync_fence)
350{ 342{
diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.h b/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
index c479f359..140f5488 100644
--- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.h
@@ -43,7 +43,7 @@ struct gk20a_fence {
43 struct nvgpu_cond *semaphore_wq; 43 struct nvgpu_cond *semaphore_wq;
44 44
45 /* Valid for fences created from syncpoints: */ 45 /* Valid for fences created from syncpoints: */
46 struct platform_device *host1x_pdev; 46 struct nvgpu_nvhost_dev *nvhost_dev;
47 u32 syncpt_id; 47 u32 syncpt_id;
48 u32 syncpt_value; 48 u32 syncpt_value;
49 49
@@ -62,7 +62,7 @@ int gk20a_fence_from_semaphore(
62 62
63int gk20a_fence_from_syncpt( 63int gk20a_fence_from_syncpt(
64 struct gk20a_fence *fence_out, 64 struct gk20a_fence *fence_out,
65 struct platform_device *host1x_pdev, 65 struct nvgpu_nvhost_dev *nvhost_dev,
66 u32 id, u32 value, bool wfi, 66 u32 id, u32 value, bool wfi,
67 bool need_sync_fence); 67 bool need_sync_fence);
68 68
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 7eb28f2f..4b0667c5 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -18,9 +18,6 @@
18 */ 18 */
19 19
20#include <trace/events/gk20a.h> 20#include <trace/events/gk20a.h>
21#ifdef CONFIG_TEGRA_GK20A_NVHOST
22#include <linux/nvhost.h>
23#endif
24 21
25#include <nvgpu/dma.h> 22#include <nvgpu/dma.h>
26#include <nvgpu/timers.h> 23#include <nvgpu/timers.h>
@@ -32,6 +29,7 @@
32#include <nvgpu/bug.h> 29#include <nvgpu/bug.h>
33#include <nvgpu/log2.h> 30#include <nvgpu/log2.h>
34#include <nvgpu/debug.h> 31#include <nvgpu/debug.h>
32#include <nvgpu/nvhost.h>
35 33
36#include "gk20a.h" 34#include "gk20a.h"
37#include "ctxsw_trace_gk20a.h" 35#include "ctxsw_trace_gk20a.h"
@@ -3537,7 +3535,7 @@ void gk20a_dump_channel_status_ramfc(struct gk20a *g,
3537 gk20a_debug_output(o, "%s on syncpt %u (%s) val %u\n", 3535 gk20a_debug_output(o, "%s on syncpt %u (%s) val %u\n",
3538 (status == 3 || status == 8) ? "Waiting" : "Waited", 3536 (status == 3 || status == 8) ? "Waiting" : "Waited",
3539 pbdma_syncpointb_syncpt_index_v(syncpointb), 3537 pbdma_syncpointb_syncpt_index_v(syncpointb),
3540 nvhost_syncpt_get_name(g->host1x_dev, 3538 nvgpu_nvhost_syncpt_get_name(g->nvhost_dev,
3541 pbdma_syncpointb_syncpt_index_v(syncpointb)), 3539 pbdma_syncpointb_syncpt_index_v(syncpointb)),
3542 pbdma_syncpointa_payload_v(syncpointa)); 3540 pbdma_syncpointa_payload_v(syncpointa));
3543#endif 3541#endif
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8691c73d..b4884af1 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -981,7 +981,6 @@ struct nvgpu_bios {
981 981
982struct gk20a { 982struct gk20a {
983 struct device *dev; 983 struct device *dev;
984 struct platform_device *host1x_dev;
985 struct nvgpu_nvhost_dev *nvhost_dev; 984 struct nvgpu_nvhost_dev *nvhost_dev;
986 985
987 /* 986 /*
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
index 1065968b..4a79a142 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c
@@ -28,6 +28,7 @@
28#endif 28#endif
29 29
30#include <nvgpu/kmem.h> 30#include <nvgpu/kmem.h>
31#include <nvgpu/nvhost.h>
31 32
32#include "gk20a.h" 33#include "gk20a.h"
33#include "gk20a/platform_gk20a.h" 34#include "gk20a/platform_gk20a.h"
@@ -889,8 +890,6 @@ static DEVICE_ATTR(max_timeslice_us, ROOTRW, max_timeslice_us_read,
889 890
890void gk20a_remove_sysfs(struct device *dev) 891void gk20a_remove_sysfs(struct device *dev)
891{ 892{
892 struct gk20a *g = get_gk20a(dev);
893
894 device_remove_file(dev, &dev_attr_elcg_enable); 893 device_remove_file(dev, &dev_attr_elcg_enable);
895 device_remove_file(dev, &dev_attr_blcg_enable); 894 device_remove_file(dev, &dev_attr_blcg_enable);
896 device_remove_file(dev, &dev_attr_slcg_enable); 895 device_remove_file(dev, &dev_attr_slcg_enable);
@@ -917,9 +916,9 @@ void gk20a_remove_sysfs(struct device *dev)
917 device_remove_file(dev, &dev_attr_min_timeslice_us); 916 device_remove_file(dev, &dev_attr_min_timeslice_us);
918 device_remove_file(dev, &dev_attr_max_timeslice_us); 917 device_remove_file(dev, &dev_attr_max_timeslice_us);
919 918
920 if (g->host1x_dev && (dev->parent != &g->host1x_dev->dev)) { 919#ifdef CONFIG_TEGRA_GK20A_NVHOST
921 sysfs_remove_link(&g->host1x_dev->dev.kobj, dev_name(dev)); 920 nvgpu_nvhost_remove_symlink(get_gk20a(dev));
922 } 921#endif
923 922
924 if (strcmp(dev_name(dev), "gpu.0")) { 923 if (strcmp(dev_name(dev), "gpu.0")) {
925 struct kobject *kobj = &dev->kobj; 924 struct kobject *kobj = &dev->kobj;
@@ -931,7 +930,6 @@ void gk20a_remove_sysfs(struct device *dev)
931 930
932void gk20a_create_sysfs(struct device *dev) 931void gk20a_create_sysfs(struct device *dev)
933{ 932{
934 struct gk20a *g = gk20a_from_dev(dev);
935 int error = 0; 933 int error = 0;
936 934
937 error |= device_create_file(dev, &dev_attr_elcg_enable); 935 error |= device_create_file(dev, &dev_attr_elcg_enable);
@@ -960,11 +958,9 @@ void gk20a_create_sysfs(struct device *dev)
960 error |= device_create_file(dev, &dev_attr_min_timeslice_us); 958 error |= device_create_file(dev, &dev_attr_min_timeslice_us);
961 error |= device_create_file(dev, &dev_attr_max_timeslice_us); 959 error |= device_create_file(dev, &dev_attr_max_timeslice_us);
962 960
963 if (g->host1x_dev && (dev->parent != &g->host1x_dev->dev)) { 961#ifdef CONFIG_TEGRA_GK20A_NVHOST
964 error |= sysfs_create_link(&g->host1x_dev->dev.kobj, 962 error |= nvgpu_nvhost_create_symlink(get_gk20a(dev));
965 &dev->kobj, 963#endif
966 dev_name(dev));
967 }
968 964
969 if (strcmp(dev_name(dev), "gpu.0")) { 965 if (strcmp(dev_name(dev), "gpu.0")) {
970 struct kobject *kobj = &dev->kobj; 966 struct kobject *kobj = &dev->kobj;
diff --git a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
index 049d394e..e33fc29f 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
@@ -13,38 +13,20 @@
13 * more details. 13 * more details.
14 */ 14 */
15 15
16#include <linux/of_platform.h>
17
18#include "gk20a.h" 16#include "gk20a.h"
19#include "hal_gk20a.h" 17#include "hal_gk20a.h"
20#include "platform_gk20a.h" 18#include "platform_gk20a.h"
21 19
20#include <nvgpu/nvhost.h>
21
22static int gk20a_tegra_probe(struct device *dev) 22static int gk20a_tegra_probe(struct device *dev)
23{ 23{
24#ifdef CONFIG_TEGRA_GK20A_NVHOST
24 struct gk20a_platform *platform = dev_get_drvdata(dev); 25 struct gk20a_platform *platform = dev_get_drvdata(dev);
25 struct device_node *np = dev->of_node; 26 return nvgpu_get_nvhost_dev(platform->g);
26 const __be32 *host1x_ptr; 27#else
27 struct platform_device *host1x_pdev = NULL;
28
29 host1x_ptr = of_get_property(np, "nvidia,host1x", NULL);
30 if (host1x_ptr) {
31 struct device_node *host1x_node =
32 of_find_node_by_phandle(be32_to_cpup(host1x_ptr));
33
34 host1x_pdev = of_find_device_by_node(host1x_node);
35 if (!host1x_pdev) {
36 dev_warn(dev, "host1x device not available");
37 return -EPROBE_DEFER;
38 }
39
40 } else {
41 host1x_pdev = to_platform_device(dev->parent);
42 dev_warn(dev, "host1x reference not found. assuming host1x to be parent");
43 }
44
45 platform->g->host1x_dev = host1x_pdev;
46
47 return 0; 28 return 0;
29#endif
48} 30}
49 31
50struct gk20a_platform vgpu_tegra_platform = { 32struct gk20a_platform vgpu_tegra_platform = {
diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
index 8a83f7d0..f55ea6d2 100644
--- a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
@@ -15,9 +15,6 @@
15 15
16#include <linux/version.h> 16#include <linux/version.h>
17#include <linux/of_platform.h> 17#include <linux/of_platform.h>
18#ifdef CONFIG_TEGRA_GK20A_NVHOST
19#include <linux/nvhost.h>
20#endif
21#include <linux/debugfs.h> 18#include <linux/debugfs.h>
22#include <linux/platform_data/tegra_edp.h> 19#include <linux/platform_data/tegra_edp.h>
23#include <linux/delay.h> 20#include <linux/delay.h>
@@ -48,6 +45,7 @@
48#include <nvgpu/kmem.h> 45#include <nvgpu/kmem.h>
49#include <nvgpu/bug.h> 46#include <nvgpu/bug.h>
50#include <nvgpu/enabled.h> 47#include <nvgpu/enabled.h>
48#include <nvgpu/nvhost.h>
51 49
52#include <nvgpu/linux/dma.h> 50#include <nvgpu/linux/dma.h>
53 51
@@ -721,8 +719,8 @@ void gk20a_tegra_debug_dump(struct device *dev)
721 struct gk20a_platform *platform = gk20a_get_platform(dev); 719 struct gk20a_platform *platform = gk20a_get_platform(dev);
722 struct gk20a *g = platform->g; 720 struct gk20a *g = platform->g;
723 721
724 if (g->host1x_dev) 722 if (g->nvhost_dev)
725 nvhost_debug_dump_device(g->host1x_dev); 723 nvgpu_nvhost_debug_dump_device(g->nvhost_dev);
726#endif 724#endif
727} 725}
728 726
@@ -732,8 +730,8 @@ int gk20a_tegra_busy(struct device *dev)
732 struct gk20a_platform *platform = gk20a_get_platform(dev); 730 struct gk20a_platform *platform = gk20a_get_platform(dev);
733 struct gk20a *g = platform->g; 731 struct gk20a *g = platform->g;
734 732
735 if (g->host1x_dev) 733 if (g->nvhost_dev)
736 return nvhost_module_busy_ext(g->host1x_dev); 734 return nvgpu_nvhost_module_busy_ext(g->nvhost_dev);
737#endif 735#endif
738 return 0; 736 return 0;
739} 737}
@@ -744,8 +742,8 @@ void gk20a_tegra_idle(struct device *dev)
744 struct gk20a_platform *platform = gk20a_get_platform(dev); 742 struct gk20a_platform *platform = gk20a_get_platform(dev);
745 struct gk20a *g = platform->g; 743 struct gk20a *g = platform->g;
746 744
747 if (g->host1x_dev) 745 if (g->nvhost_dev)
748 nvhost_module_idle_ext(g->host1x_dev); 746 nvgpu_nvhost_module_idle_ext(g->nvhost_dev);
749#endif 747#endif
750} 748}
751 749
@@ -864,8 +862,6 @@ static int gk20a_tegra_probe(struct device *dev)
864{ 862{
865 struct gk20a_platform *platform = dev_get_drvdata(dev); 863 struct gk20a_platform *platform = dev_get_drvdata(dev);
866 struct device_node *np = dev->of_node; 864 struct device_node *np = dev->of_node;
867 const __be32 *host1x_ptr;
868 struct platform_device *host1x_pdev = NULL;
869 bool joint_xpu_rail = false; 865 bool joint_xpu_rail = false;
870 int ret; 866 int ret;
871 867
@@ -887,23 +883,11 @@ static int gk20a_tegra_probe(struct device *dev)
887 } 883 }
888#endif 884#endif
889 885
890 host1x_ptr = of_get_property(np, "nvidia,host1x", NULL); 886#ifdef CONFIG_TEGRA_GK20A_NVHOST
891 if (host1x_ptr) { 887 ret = nvgpu_get_nvhost_dev(platform->g);
892 struct device_node *host1x_node = 888 if (ret)
893 of_find_node_by_phandle(be32_to_cpup(host1x_ptr)); 889 return ret;
894 890#endif
895 host1x_pdev = of_find_device_by_node(host1x_node);
896 if (!host1x_pdev) {
897 dev_warn(dev, "host1x device not available");
898 return -EPROBE_DEFER;
899 }
900
901 } else {
902 host1x_pdev = to_platform_device(dev->parent);
903 dev_warn(dev, "host1x reference not found. assuming host1x to be parent");
904 }
905
906 platform->g->host1x_dev = host1x_pdev;
907 891
908#ifdef CONFIG_OF 892#ifdef CONFIG_OF
909 joint_xpu_rail = of_property_read_bool(of_chosen, 893 joint_xpu_rail = of_property_read_bool(of_chosen,
@@ -967,6 +951,10 @@ static int gk20a_tegra_remove(struct device *dev)
967 /* deinitialise tegra specific scaling quirks */ 951 /* deinitialise tegra specific scaling quirks */
968 gk20a_tegra_scale_exit(dev); 952 gk20a_tegra_scale_exit(dev);
969 953
954#ifdef CONFIG_TEGRA_GK20A_NVHOST
955 nvgpu_free_nvhost_dev(get_gk20a(dev));
956#endif
957
970 return 0; 958 return 0;
971} 959}
972 960
diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
index 8b530fac..235473d3 100644
--- a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
+++ b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
@@ -14,7 +14,6 @@
14 */ 14 */
15 15
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/nvhost.h>
18#include <linux/debugfs.h> 17#include <linux/debugfs.h>
19#include <linux/dma-buf.h> 18#include <linux/dma-buf.h>
20#include <linux/nvmap.h> 19#include <linux/nvmap.h>
@@ -30,6 +29,7 @@
30#include <nvgpu/bug.h> 29#include <nvgpu/bug.h>
31#include <nvgpu/enabled.h> 30#include <nvgpu/enabled.h>
32#include <nvgpu/hashtable.h> 31#include <nvgpu/hashtable.h>
32#include <nvgpu/nvhost.h>
33 33
34#include "clk.h" 34#include "clk.h"
35 35
@@ -130,26 +130,14 @@ static void gp10b_tegra_scale_exit(struct device *dev)
130static int gp10b_tegra_probe(struct device *dev) 130static int gp10b_tegra_probe(struct device *dev)
131{ 131{
132 struct gk20a_platform *platform = dev_get_drvdata(dev); 132 struct gk20a_platform *platform = dev_get_drvdata(dev);
133 struct gk20a *g = platform->g; 133#ifdef CONFIG_TEGRA_GK20A_NVHOST
134 struct device_node *np = dev->of_node; 134 int ret;
135 struct device_node *host1x_node;
136 struct platform_device *host1x_pdev;
137 const __be32 *host1x_ptr;
138
139 host1x_ptr = of_get_property(np, "nvidia,host1x", NULL);
140 if (!host1x_ptr) {
141 nvgpu_err(g, "host1x device not available");
142 return -ENOSYS;
143 }
144 135
145 host1x_node = of_find_node_by_phandle(be32_to_cpup(host1x_ptr)); 136 ret = nvgpu_get_nvhost_dev(platform->g);
146 host1x_pdev = of_find_device_by_node(host1x_node); 137 if (ret)
147 if (!host1x_pdev) { 138 return ret;
148 nvgpu_err(g, "host1x device not available"); 139#endif
149 return -ENOSYS;
150 }
151 140
152 platform->g->host1x_dev = host1x_pdev;
153 platform->bypass_smmu = !device_is_iommuable(dev); 141 platform->bypass_smmu = !device_is_iommuable(dev);
154 platform->disable_bigpage = platform->bypass_smmu; 142 platform->disable_bigpage = platform->bypass_smmu;
155 143
@@ -190,8 +178,11 @@ int gp10b_tegra_remove(struct device *dev)
190 /* deinitialise tegra specific scaling quirks */ 178 /* deinitialise tegra specific scaling quirks */
191 gp10b_tegra_scale_exit(dev); 179 gp10b_tegra_scale_exit(dev);
192 180
193 return 0; 181#ifdef CONFIG_TEGRA_GK20A_NVHOST
182 nvgpu_free_nvhost_dev(get_gk20a(dev));
183#endif
194 184
185 return 0;
195} 186}
196 187
197static bool gp10b_tegra_is_railgated(struct device *dev) 188static bool gp10b_tegra_is_railgated(struct device *dev)