diff options
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_pg.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h | 16 |
3 files changed, 27 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c index 046f4d59..47ac8b64 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c | |||
@@ -60,19 +60,19 @@ static void pmu_handle_pg_elpg_msg(struct gk20a *g, struct pmu_msg *msg, | |||
60 | case PMU_PG_ELPG_MSG_ALLOW_ACK: | 60 | case PMU_PG_ELPG_MSG_ALLOW_ACK: |
61 | nvgpu_pmu_dbg(g, "ALLOW is ack from PMU, eng - %d", | 61 | nvgpu_pmu_dbg(g, "ALLOW is ack from PMU, eng - %d", |
62 | elpg_msg->engine_id); | 62 | elpg_msg->engine_id); |
63 | if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_GRAPHICS) | 63 | if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS) |
64 | pmu->elpg_stat = PMU_ELPG_STAT_ON; | ||
65 | else if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS) | ||
66 | pmu->mscg_transition_state = PMU_ELPG_STAT_ON; | 64 | pmu->mscg_transition_state = PMU_ELPG_STAT_ON; |
65 | else | ||
66 | pmu->elpg_stat = PMU_ELPG_STAT_ON; | ||
67 | break; | 67 | break; |
68 | case PMU_PG_ELPG_MSG_DISALLOW_ACK: | 68 | case PMU_PG_ELPG_MSG_DISALLOW_ACK: |
69 | nvgpu_pmu_dbg(g, "DISALLOW is ack from PMU, eng - %d", | 69 | nvgpu_pmu_dbg(g, "DISALLOW is ack from PMU, eng - %d", |
70 | elpg_msg->engine_id); | 70 | elpg_msg->engine_id); |
71 | 71 | ||
72 | if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_GRAPHICS) | 72 | if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS) |
73 | pmu->elpg_stat = PMU_ELPG_STAT_OFF; | ||
74 | else if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS) | ||
75 | pmu->mscg_transition_state = PMU_ELPG_STAT_OFF; | 73 | pmu->mscg_transition_state = PMU_ELPG_STAT_OFF; |
74 | else | ||
75 | pmu->elpg_stat = PMU_ELPG_STAT_OFF; | ||
76 | 76 | ||
77 | if (pmu->pmu_state == PMU_STATE_ELPG_BOOTING) { | 77 | if (pmu->pmu_state == PMU_STATE_ELPG_BOOTING) { |
78 | if (g->ops.pmu.pmu_pg_engines_feature_list && | 78 | if (g->ops.pmu.pmu_pg_engines_feature_list && |
@@ -412,6 +412,9 @@ static int pmu_pg_init_send(struct gk20a *g, u32 pg_engine_id) | |||
412 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 412 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
413 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); | 413 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); |
414 | 414 | ||
415 | if (g->ops.pmu.pmu_pg_set_sub_feature_mask) | ||
416 | g->ops.pmu.pmu_pg_set_sub_feature_mask(g, pg_engine_id); | ||
417 | |||
415 | return 0; | 418 | return 0; |
416 | } | 419 | } |
417 | 420 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index d1a55104..84e10448 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -755,6 +755,8 @@ struct gpu_ops { | |||
755 | void (*pmu_elpg_statistics)(struct gk20a *g, u32 pg_engine_id, | 755 | void (*pmu_elpg_statistics)(struct gk20a *g, u32 pg_engine_id, |
756 | struct pmu_pg_stats_data *pg_stat_data); | 756 | struct pmu_pg_stats_data *pg_stat_data); |
757 | int (*pmu_pg_init_param)(struct gk20a *g, u32 pg_engine_id); | 757 | int (*pmu_pg_init_param)(struct gk20a *g, u32 pg_engine_id); |
758 | int (*pmu_pg_set_sub_feature_mask)(struct gk20a *g, | ||
759 | u32 pg_engine_id); | ||
758 | u32 (*pmu_pg_supported_engines_list)(struct gk20a *g); | 760 | u32 (*pmu_pg_supported_engines_list)(struct gk20a *g); |
759 | u32 (*pmu_pg_engines_feature_list)(struct gk20a *g, | 761 | u32 (*pmu_pg_engines_feature_list)(struct gk20a *g, |
760 | u32 pg_engine_id); | 762 | u32 pg_engine_id); |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h index 8c71e2a2..94115b5c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h | |||
@@ -117,6 +117,7 @@ enum { | |||
117 | #define PMU_PG_PARAM_CMD_MS_INIT_PARAM 0x01 | 117 | #define PMU_PG_PARAM_CMD_MS_INIT_PARAM 0x01 |
118 | #define PMU_PG_PARAM_CMD_MCLK_CHANGE 0x04 | 118 | #define PMU_PG_PARAM_CMD_MCLK_CHANGE 0x04 |
119 | #define PMU_PG_PARAM_CMD_POST_INIT 0x06 | 119 | #define PMU_PG_PARAM_CMD_POST_INIT 0x06 |
120 | #define PMU_PG_PARAM_CMD_SUB_FEATURE_MASK_UPDATE 0x07 | ||
120 | 121 | ||
121 | #define PMU_PG_FEATURE_GR_SDIV_SLOWDOWN_ENABLED (1 << 0) | 122 | #define PMU_PG_FEATURE_GR_SDIV_SLOWDOWN_ENABLED (1 << 0) |
122 | #define PMU_PG_FEATURE_GR_POWER_GATING_ENABLED (1 << 2) | 123 | #define PMU_PG_FEATURE_GR_POWER_GATING_ENABLED (1 << 2) |
@@ -185,6 +186,19 @@ struct pmu_pg_cmd_gr_init_param { | |||
185 | u8 featuremask; | 186 | u8 featuremask; |
186 | }; | 187 | }; |
187 | 188 | ||
189 | struct pmu_pg_cmd_gr_init_param_v1 { | ||
190 | u8 cmd_type; | ||
191 | u16 sub_cmd_id; | ||
192 | u32 featuremask; | ||
193 | }; | ||
194 | |||
195 | struct pmu_pg_cmd_sub_feature_mask_update { | ||
196 | u8 cmd_type; | ||
197 | u16 sub_cmd_id; | ||
198 | u8 ctrl_id; | ||
199 | u32 enabled_mask; | ||
200 | }; | ||
201 | |||
188 | struct pmu_pg_cmd_ms_init_param { | 202 | struct pmu_pg_cmd_ms_init_param { |
189 | u8 cmd_type; | 203 | u8 cmd_type; |
190 | u16 cmd_id; | 204 | u16 cmd_id; |
@@ -236,12 +250,14 @@ struct pmu_pg_cmd { | |||
236 | struct pmu_pg_cmd_eng_buf_load_v2 eng_buf_load_v2; | 250 | struct pmu_pg_cmd_eng_buf_load_v2 eng_buf_load_v2; |
237 | struct pmu_pg_cmd_stat stat; | 251 | struct pmu_pg_cmd_stat stat; |
238 | struct pmu_pg_cmd_gr_init_param gr_init_param; | 252 | struct pmu_pg_cmd_gr_init_param gr_init_param; |
253 | struct pmu_pg_cmd_gr_init_param_v1 gr_init_param_v1; | ||
239 | struct pmu_pg_cmd_ms_init_param ms_init_param; | 254 | struct pmu_pg_cmd_ms_init_param ms_init_param; |
240 | struct pmu_pg_cmd_mclk_change mclk_change; | 255 | struct pmu_pg_cmd_mclk_change mclk_change; |
241 | struct pmu_pg_cmd_post_init_param post_init; | 256 | struct pmu_pg_cmd_post_init_param post_init; |
242 | /* TBD: other pg commands */ | 257 | /* TBD: other pg commands */ |
243 | union pmu_ap_cmd ap_cmd; | 258 | union pmu_ap_cmd ap_cmd; |
244 | struct nv_pmu_rppg_cmd rppg_cmd; | 259 | struct nv_pmu_rppg_cmd rppg_cmd; |
260 | struct pmu_pg_cmd_sub_feature_mask_update sf_mask_update; | ||
245 | }; | 261 | }; |
246 | }; | 262 | }; |
247 | 263 | ||