3 files changed, 27 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
index 046f4d59..47ac8b64 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
@@ -60,19 +60,19 @@ static void pmu_handle_pg_elpg_msg(struct gk20a *g, struct pmu_msg *msg,
         case PMU_PG_ELPG_MSG_ALLOW_ACK:
                 nvgpu_pmu_dbg(g, "ALLOW is ack from PMU, eng - %d",
                         elpg_msg->engine_id);
-                if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_GRAPHICS)
-                        pmu->elpg_stat = PMU_ELPG_STAT_ON;
-                else if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS)
+                if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS)
                         pmu->mscg_transition_state = PMU_ELPG_STAT_ON;
+                else
+                        pmu->elpg_stat = PMU_ELPG_STAT_ON;
                 break;
         case PMU_PG_ELPG_MSG_DISALLOW_ACK:
                 nvgpu_pmu_dbg(g, "DISALLOW is ack from PMU, eng - %d",
                         elpg_msg->engine_id);
 
-                if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_GRAPHICS)
-                        pmu->elpg_stat = PMU_ELPG_STAT_OFF;
-                else if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS)
+                if (elpg_msg->engine_id == PMU_PG_ELPG_ENGINE_ID_MS)
                         pmu->mscg_transition_state = PMU_ELPG_STAT_OFF;
+                else
+                        pmu->elpg_stat = PMU_ELPG_STAT_OFF;
 
                 if (pmu->pmu_state == PMU_STATE_ELPG_BOOTING) {
                         if (g->ops.pmu.pmu_pg_engines_feature_list &&
@@ -412,6 +412,9 @@ static int pmu_pg_init_send(struct gk20a *g, u32 pg_engine_id)
         gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ,
                 pmu_handle_pg_elpg_msg, pmu, &seq, ~0);
 
+        if (g->ops.pmu.pmu_pg_set_sub_feature_mask)
+                g->ops.pmu.pmu_pg_set_sub_feature_mask(g, pg_engine_id);
+
         return 0;
 }
 
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index d1a55104..84e10448 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -755,6 +755,8 @@ struct gpu_ops {
                 void (*pmu_elpg_statistics)(struct gk20a *g, u32 pg_engine_id,
                         struct pmu_pg_stats_data *pg_stat_data);
                 int (*pmu_pg_init_param)(struct gk20a *g, u32 pg_engine_id);
+                int (*pmu_pg_set_sub_feature_mask)(struct gk20a *g,
+                        u32 pg_engine_id);
                 u32 (*pmu_pg_supported_engines_list)(struct gk20a *g);
                 u32 (*pmu_pg_engines_feature_list)(struct gk20a *g,
                         u32 pg_engine_id);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h
index 8c71e2a2..94115b5c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pg.h
@@ -117,6 +117,7 @@ enum {
 #define PMU_PG_PARAM_CMD_MS_INIT_PARAM  0x01
 #define PMU_PG_PARAM_CMD_MCLK_CHANGE  0x04
 #define PMU_PG_PARAM_CMD_POST_INIT  0x06
+#define PMU_PG_PARAM_CMD_SUB_FEATURE_MASK_UPDATE  0x07
 
 #define PMU_PG_FEATURE_GR_SDIV_SLOWDOWN_ENABLED (1 << 0)
 #define PMU_PG_FEATURE_GR_POWER_GATING_ENABLED  (1 << 2)
@@ -185,6 +186,19 @@ struct pmu_pg_cmd_gr_init_param {
         u8 featuremask;
 };
 
+struct pmu_pg_cmd_gr_init_param_v1 {
+        u8 cmd_type;
+        u16 sub_cmd_id;
+        u32 featuremask;
+};
+
+struct pmu_pg_cmd_sub_feature_mask_update {
+        u8 cmd_type;
+        u16 sub_cmd_id;
+        u8 ctrl_id;
+        u32 enabled_mask;
+};
+
 struct pmu_pg_cmd_ms_init_param {
         u8 cmd_type;
         u16 cmd_id;
@@ -236,12 +250,14 @@ struct pmu_pg_cmd {
                 struct pmu_pg_cmd_eng_buf_load_v2 eng_buf_load_v2;
                 struct pmu_pg_cmd_stat stat;
                 struct pmu_pg_cmd_gr_init_param gr_init_param;
+                struct pmu_pg_cmd_gr_init_param_v1 gr_init_param_v1;
                 struct pmu_pg_cmd_ms_init_param ms_init_param;
                 struct pmu_pg_cmd_mclk_change mclk_change;
                 struct pmu_pg_cmd_post_init_param post_init;
                 /* TBD: other pg commands */
                 union pmu_ap_cmd ap_cmd;
                 struct nv_pmu_rppg_cmd rppg_cmd;
+                struct pmu_pg_cmd_sub_feature_mask_update sf_mask_update;
         };
 };