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| author | Divya Singhatwaria <dsinghatwari@nvidia.com> | 2019-07-23 01:13:35 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-08-02 15:57:24 -0400 |
| commit | ae175e45edc5807131dfb1b63d3e4795e96a3f86 (patch) | |
| tree | c209caf5a5804f250be83e4a68295daa64d6cfb5 /userspace/units/posix-mockio/Makefile.interface.tmk | |
| parent | 47f6bc0c2e85d0a8ff943b88c81108ca1bfc588e (diff) | |
gpu: nvgpu: Use TPC_PG_MASK to powergate the TPC
- In GV11B, read fuse_status_opt_tpc_gpc register
to read which TPCs are floorswept.
- The driver will also read sysfs node: tpc_pg_mask
- Based on these two values "can_tpc_powergate" will
be set to true or false and mask will be used to write to
fuse_ctrl_opt_tpc_gpc register to powergate the TPC.
- can_tpc_powergate = true indicates that the mask value
sent from userspace is valid and can be used to power gate
the desired TPC
- can_tpc_powergate = false indicates that the mask value
sent from userspace is not valid and cannot be used to
power gate the desired TPC.
Bug 200532639
Change-Id: Ib0806e4c96305a13b3574e8063ad8e16770aa7cd
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159219
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'userspace/units/posix-mockio/Makefile.interface.tmk')
0 files changed, 0 insertions, 0 deletions