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author | Konsta Holtta <kholtta@nvidia.com> | 2018-09-11 07:35:19 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-08-15 03:58:15 -0400 |
commit | 8281262187c50be841a83a5b99e2485836922269 (patch) | |
tree | 58885b8d2e7f894ecc964fb21c0643245210d383 /userspace/units/posix-bitops | |
parent | eca2cf043e3f52734e2fbba68631a2ef70dad76d (diff) |
gpu: nvgpu: add usermode_base HAL
Add a HAL function pointer to fifo to for reading the usermode_cfg0
register and implement it for gv11b.
Bug 200145225
Bug 200541476
Change-Id: I5f77b15d3b502d9370b1f14129314eaf51a9d7d1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1811839
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit fddb2969240652e1a56089b249684b55430d45c5
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170004
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'userspace/units/posix-bitops')
0 files changed, 0 insertions, 0 deletions