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| author | Scott Long <scottl@nvidia.com> | 2018-08-31 18:43:24 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-04 13:54:24 -0400 |
| commit | a18f364fd28cf6a19edcb55b22a9b458d29a826d (patch) | |
| tree | 863e2887e79cce82e6e475c68cb2817c82bd0e05 /userspace/include/unit | |
| parent | cf394f82d47901a0ea981e9229db5b51bc05a81a (diff) | |
gpu: nvgpu: fix various MISRA 10.1 bool violations
This patch corrects a handful of MISRA 10.1 violations involving
illegal arithmetic operations (e.g. bitwise OR) on boolean values:
* fix to status handling in regops validation code
* fix to debugger event handling in gr code
* fix to entries_left tracking in runlist construct code
* fix to verbose channel dumping and reset tracking in fifo code
JIRA NVGPU-650
Change-Id: I3c3d9123b5a0e08fc936d0e63d51de99fc310ade
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810957
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'userspace/include/unit')
0 files changed, 0 insertions, 0 deletions