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authorSrirangan <smadhavan@nvidia.com>2018-08-02 05:47:55 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-10 01:28:15 -0400
commit6b26d233499f9d447f06e8e72c72ed6728762e37 (patch)
treed983b078e372165b44e51d119e9b4b61ac9bbc1c /userspace/include/unit
parent9c13b30a465ed94f1e3547dc439462c3ea496eb8 (diff)
gpu: nvgpu: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all loop bodies must be enclosed in braces including single statement loop bodies. This patch fix the MISRA violations due to single statement loop bodies without braces by adding them. JIRA NVGPU-989 Change-Id: If79f56f92b94d0114477b66a6f654ac16ee8ea27 Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1791194 Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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