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| author | Seema Khowala <seemaj@nvidia.com> | 2017-06-21 15:03:11 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-30 03:05:05 -0400 |
| commit | 6f6329c377ae12f0bf3790c15c582e454d90d3f9 (patch) | |
| tree | dc3c461e4c90871b232c08902633eebd637dd8ea /scripts | |
| parent | ec71ac29576afa676e056b42c13f073a17ba57e9 (diff) | |
gpu: nvgpu: gv11b: init set_hww_esr_report_mask
gv11b has 2 SMs per TPC. Use *gpcs_tpcs_sms_hww_warp/global_esr*
registers instead of *gpcs_tpcs_sm_hww_warp/global_esr*
GPUT19X-75
Change-Id: I86c7ded32b2b69214e047e6de67a1745f2cef6f3
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1474860
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions