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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-08-26 13:21:59 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-31 13:33:47 -0500 |
commit | 39112867cc3a0a7d4f64b3df8702bee4ccd68b5e (patch) | |
tree | 95df18a496e5850d7f580d0834c5ce1870b7ed73 /scripts | |
parent | 4bd9682c924d4e10e715f9f271a1e7461f9c1f59 (diff) |
gpu: nvgpu: Clear timer registers on bus intr
Clear error address and code from timer registers. This allows
following errors to report correctly.
Change-Id: I9845ce77347ea7b9231e33f4164098cbb8694ba3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions