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authorPeter Daifuku <pdaifuku@nvidia.com>2017-08-08 18:48:23 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-22 20:08:09 -0400
commitbcf556b640a3680522b03042574081abe0e17fef (patch)
tree8dac3c7d78fdb62da60f00f5f63ceec394796726 /scripts/checkpatch.pl
parent5df1d3ff7a23ec39ea5fc841b2dbfe98fa74b44a (diff)
gpu: nvgpu: correct NUM_FBPAS
Although igpu does not have an FBPA unit, the hardware reports one, and the ucode leaves space for one in the HWPM context save buffer. So let NUM_FBPAS reflect this, so that registers that follow this section in the context buffer are offset properly JIRA EVLR-1716 Change-Id: I067d5ec3afd356bcb4270fc2b5d12daef2ce3944 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1535274 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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