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authorSeema Khowala <seemaj@nvidia.com>2017-06-28 01:10:49 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-02 13:20:21 -0400
commit5cda5a3074e4c7dae1857e1dfdf55017b0450786 (patch)
treed560ec2929650c91016ae13b9ae2b3f3f30e4982 /scripts/checkpatch.pl
parent8a0221cfc735f79c94447ff5922e26c313e0f177 (diff)
gpu: nvgpu: gv11b: add a function to reset pbdma and eng faulted
When Host receives a page fault signal from a CE, Host will immediately set _ENG_FAULTED bit in the NV_PCCSR_CHANNEL register for the channel and will trigger a preempt of the TSG/channel. A channel will only be scheduled when _ENABLED=1, _ENG_FAULTED=0 and _PBDMA_FAULTED=0 in pccsr_channel reg for the channel. If a TSG has a faulted channel, Host will not schedule the entire TSG agin until all _FAULTED bits from channels in the TSG are cleared by SW. This function will be required for ce page fault handling. JIRA GPUT19X-46 JIRA GPUT19X-12 Change-Id: Ib58dff7aa24aa144e970f11b5261877dec03f3e6 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master/r/1509776 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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