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author | Peter Daifuku <pdaifuku@nvidia.com> | 2017-06-21 19:44:55 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-27 18:44:11 -0400 |
commit | f7e37e6847896992077fe8d434ea14a751318175 (patch) | |
tree | a169c5648668c121ecb1b48d680843d4369cfa10 /include | |
parent | cadd5120d33e9ed5b70c620c7a54b2c9e338c1e4 (diff) |
gpu: nvgpu: vgpu: perfbuffer support
Add vgpu support for ModeE perfbuffers
- VM allocation is handled by the kernel, with final mapping
handled by the RM server
- Enabling/disabling the perfbuffer is handled by the RM server
Bug 1880196
JIRA EVLR-1074
Change-Id: Ifbeb5ede6b07e2e112b930c602c22b66a58ac920
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master/r/1506747
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/tegra_vgpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index f0a809ba..eb510438 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -104,6 +104,7 @@ enum { | |||
104 | TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE = 70, | 104 | TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE = 70, |
105 | TEGRA_VGPU_CMD_CAP_GPU_CLK_RATE = 71, | 105 | TEGRA_VGPU_CMD_CAP_GPU_CLK_RATE = 71, |
106 | TEGRA_VGPU_CMD_PROF_MGT = 72, | 106 | TEGRA_VGPU_CMD_PROF_MGT = 72, |
107 | TEGRA_VGPU_CMD_PERFBUF_MGT = 73, | ||
107 | TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74, | 108 | TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74, |
108 | }; | 109 | }; |
109 | 110 | ||
@@ -488,6 +489,12 @@ struct tegra_vgpu_prof_mgt_params { | |||
488 | u32 mode; | 489 | u32 mode; |
489 | }; | 490 | }; |
490 | 491 | ||
492 | struct tegra_vgpu_perfbuf_mgt_params { | ||
493 | u64 vm_handle; | ||
494 | u64 offset; | ||
495 | u32 size; | ||
496 | }; | ||
497 | |||
491 | #define TEGRA_VGPU_GPU_FREQ_TABLE_SIZE 25 | 498 | #define TEGRA_VGPU_GPU_FREQ_TABLE_SIZE 25 |
492 | 499 | ||
493 | struct tegra_vgpu_get_gpu_freq_table_params { | 500 | struct tegra_vgpu_get_gpu_freq_table_params { |
@@ -545,6 +552,7 @@ struct tegra_vgpu_cmd_msg { | |||
545 | struct tegra_vgpu_suspend_resume_contexts resume_contexts; | 552 | struct tegra_vgpu_suspend_resume_contexts resume_contexts; |
546 | struct tegra_vgpu_clear_sm_error_state clear_sm_error_state; | 553 | struct tegra_vgpu_clear_sm_error_state clear_sm_error_state; |
547 | struct tegra_vgpu_prof_mgt_params prof_management; | 554 | struct tegra_vgpu_prof_mgt_params prof_management; |
555 | struct tegra_vgpu_perfbuf_mgt_params perfbuf_management; | ||
548 | struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper; | 556 | struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper; |
549 | struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table; | 557 | struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table; |
550 | char padding[192]; | 558 | char padding[192]; |