summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorAparna Das <aparnad@nvidia.com>2017-08-04 20:32:02 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-24 04:26:17 -0400
commitdf4e88a21d51d5e098b66c3094fa91ae633777e5 (patch)
treeccab3efbc341bda1ebe175a58d9539d587ad9fd7 /include
parent86e1c3278fab9c7b335962549ba8f0860ef9f119 (diff)
gpu: nvgpu: vgpu: add support for gv11b syncpoints
In t19x, gv11b semaphore read and write operations are translated to host1x syncpoint read and write operations using semaphore syncpoint shim aperture. Implement relevant vgpu hal functions for this in fifo hal. Jira EVLR-1571 Change-Id: I6296cc6e592ea991e1c01bc9662d02fb063ff3c7 Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1516367 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/tegra_vgpu_t19x.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/tegra_vgpu_t19x.h b/include/linux/tegra_vgpu_t19x.h
index c2814f16..fe39230e 100644
--- a/include/linux/tegra_vgpu_t19x.h
+++ b/include/linux/tegra_vgpu_t19x.h
@@ -16,6 +16,7 @@
16 16
17#define TEGRA_VGPU_CMD_ALLOC_CTX_HEADER 100 17#define TEGRA_VGPU_CMD_ALLOC_CTX_HEADER 100
18#define TEGRA_VGPU_CMD_FREE_CTX_HEADER 101 18#define TEGRA_VGPU_CMD_FREE_CTX_HEADER 101
19#define TEGRA_VGPU_CMD_MAP_SYNCPT 102
19 20
20struct tegra_vgpu_alloc_ctx_header_params { 21struct tegra_vgpu_alloc_ctx_header_params {
21 u64 ch_handle; 22 u64 ch_handle;
@@ -26,9 +27,18 @@ struct tegra_vgpu_free_ctx_header_params {
26 u64 ch_handle; 27 u64 ch_handle;
27}; 28};
28 29
30struct tegra_vgpu_map_syncpt_params {
31 u64 as_handle;
32 u64 gpu_va;
33 u64 len;
34 u64 offset;
35 u8 prot;
36};
37
29union tegra_vgpu_t19x_params { 38union tegra_vgpu_t19x_params {
30 struct tegra_vgpu_alloc_ctx_header_params alloc_ctx_header; 39 struct tegra_vgpu_alloc_ctx_header_params alloc_ctx_header;
31 struct tegra_vgpu_free_ctx_header_params free_ctx_header; 40 struct tegra_vgpu_free_ctx_header_params free_ctx_header;
41 struct tegra_vgpu_map_syncpt_params map_syncpt;
32}; 42};
33 43
34#define TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT 100 44#define TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT 100