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authorSami Kiminki <skiminki@nvidia.com>2014-10-28 10:55:12 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:12:08 -0400
commitcc6ccd2e3fc1b097465e093a6294748113ab2cc7 (patch)
treea3eee21435af9464eb12c1325c1e3c210f0f931d /include
parentf97e7036b1448aae6b39da93692514722b690fec (diff)
gpu: nvgpu: Implement NVGPU_AS_IOCTL_GET_VA_REGIONS
Implement NVGPU_AS_IOCTL_GET_VA_REGIONS which returns a list of GPU VA regions for different page sizes. This is required for the userspace for safe fixed-address address space allocation. Bug 1551752 Change-Id: I63ddde30935db2471bec498dae0caa870e89c1a5 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/590814 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/trace/events/gk20a.h12
-rw-r--r--include/uapi/linux/nvgpu.h20
2 files changed, 31 insertions, 1 deletions
diff --git a/include/trace/events/gk20a.h b/include/trace/events/gk20a.h
index e94c5be6..84a525bd 100644
--- a/include/trace/events/gk20a.h
+++ b/include/trace/events/gk20a.h
@@ -237,6 +237,18 @@ TRACE_EVENT(gk20a_as_ioctl_unmap_buffer,
237 TP_printk("name=%s ", __entry->name) 237 TP_printk("name=%s ", __entry->name)
238); 238);
239 239
240TRACE_EVENT(gk20a_as_ioctl_get_va_regions,
241 TP_PROTO(const char *name),
242 TP_ARGS(name),
243 TP_STRUCT__entry(
244 __field(const char *, name)
245 ),
246 TP_fast_assign(
247 __entry->name = name;
248 ),
249 TP_printk("name=%s ", __entry->name)
250);
251
240TRACE_EVENT(gk20a_mmu_fault, 252TRACE_EVENT(gk20a_mmu_fault,
241 TP_PROTO(u32 fault_hi, u32 fault_lo, 253 TP_PROTO(u32 fault_hi, u32 fault_lo,
242 u32 fault_info, 254 u32 fault_info,
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 42673820..97e791df 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -793,6 +793,22 @@ struct nvgpu_as_unmap_buffer_args {
793 __u64 offset; /* in, byte address */ 793 __u64 offset; /* in, byte address */
794}; 794};
795 795
796
797struct nvgpu_as_va_region {
798 __u64 offset;
799 __u32 page_size;
800 __u32 reserved;
801 __u64 pages;
802};
803
804struct nvgpu_as_get_va_regions_args {
805 __u64 buf_addr; /* Pointer to array of nvgpu_as_va_region:s.
806 * Ignored if buf_size is 0 */
807 __u32 buf_size; /* in: userspace buf size (in bytes)
808 out: kernel buf size (in bytes) */
809 __u32 reserved;
810};
811
796#define NVGPU_AS_IOCTL_BIND_CHANNEL \ 812#define NVGPU_AS_IOCTL_BIND_CHANNEL \
797 _IOWR(NVGPU_AS_IOCTL_MAGIC, 1, struct nvgpu_as_bind_channel_args) 813 _IOWR(NVGPU_AS_IOCTL_MAGIC, 1, struct nvgpu_as_bind_channel_args)
798#define NVGPU32_AS_IOCTL_ALLOC_SPACE \ 814#define NVGPU32_AS_IOCTL_ALLOC_SPACE \
@@ -807,9 +823,11 @@ struct nvgpu_as_unmap_buffer_args {
807 _IOWR(NVGPU_AS_IOCTL_MAGIC, 6, struct nvgpu_as_alloc_space_args) 823 _IOWR(NVGPU_AS_IOCTL_MAGIC, 6, struct nvgpu_as_alloc_space_args)
808#define NVGPU_AS_IOCTL_MAP_BUFFER_EX \ 824#define NVGPU_AS_IOCTL_MAP_BUFFER_EX \
809 _IOWR(NVGPU_AS_IOCTL_MAGIC, 7, struct nvgpu_as_map_buffer_ex_args) 825 _IOWR(NVGPU_AS_IOCTL_MAGIC, 7, struct nvgpu_as_map_buffer_ex_args)
826#define NVGPU_AS_IOCTL_GET_VA_REGIONS \
827 _IOWR(NVGPU_AS_IOCTL_MAGIC, 8, struct nvgpu_as_get_va_regions_args)
810 828
811#define NVGPU_AS_IOCTL_LAST \ 829#define NVGPU_AS_IOCTL_LAST \
812 _IOC_NR(NVGPU_AS_IOCTL_MAP_BUFFER_EX) 830 _IOC_NR(NVGPU_AS_IOCTL_GET_VA_REGIONS)
813#define NVGPU_AS_IOCTL_MAX_ARG_SIZE \ 831#define NVGPU_AS_IOCTL_MAX_ARG_SIZE \
814 sizeof(struct nvgpu_as_map_buffer_ex_args) 832 sizeof(struct nvgpu_as_map_buffer_ex_args)
815 833