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author | Peter Daifuku <pdaifuku@nvidia.com> | 2016-06-23 16:29:31 -0400 |
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committer | Vladislav Buzov <vbuzov@nvidia.com> | 2016-07-22 12:20:22 -0400 |
commit | b2a86525278423b60797bb25b3bd89aeefba77d4 (patch) | |
tree | 3cac4910b4c1ac3456d25d25c554c88011a01bf9 /include | |
parent | 6706e4c40646cbde8a8106a13de285eda6ede701 (diff) |
gpu: nvgpu: fix pri_is_be_addr
Correct the formula used to determine the range for BE registers
Bug 1778245
Change-Id: I5443b3e68d920cecd031a9b154ed90f26e5251b2
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1170602
(cherry picked from commit 813a08f1aa758d718987b4e6f2cf2ac8d15a1611)
Reviewed-on: http://git-master/r/1177828
(cherry picked from commit de8239a5c6241419b98276a5f549ed8cfd7f4cf9)
Reviewed-on: http://git-master/r/1181500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions