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authorDeepak Nibade <dnibade@nvidia.com>2018-02-13 07:02:38 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-02-26 06:48:11 -0500
commit8d5536271f989e01018a543016340a3d76a2fae2 (patch)
treec4981034e75b1933862b35518157c0897027e2b7 /include
parent180604fec0bde1710923e78a3877d49892cbf883 (diff)
gpu: nvgpu: add user API to get a syncpoint
Add new user API NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT which will expose per-channel allocated syncpoint to user space API will also return current value of the syncpoint On supported platforms, this API will also return a RW semaphore address (corresponding to syncpoint shim) to user space Add new characteristics flag NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT to indicate support for this new API Add new flag NVGPU_SUPPORT_USER_SYNCPOINT for use of core driver Set this flag for GV11B and GP10B for now Add a new API (*syncpt_address) in struct gk20a_channel_sync to get GPU_VA address of a syncpoint Add new API nvgpu_nvhost_syncpt_read_maxval() which will read and return MAX value of syncpoint Bug 200326065 Jira NVGPU-179 Change-Id: I9da6f17b85996f4fc6731c0bf94fca6f3181c3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1658009 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/linux/nvgpu.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index f8211374..cf75595a 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -154,6 +154,8 @@ struct nvgpu_gpu_zbc_query_table_args {
154#define NVGPU_GPU_FLAGS_SUPPORT_SYNCPOINT_ADDRESS (1ULL << 26) 154#define NVGPU_GPU_FLAGS_SUPPORT_SYNCPOINT_ADDRESS (1ULL << 26)
155/* VPR is supported */ 155/* VPR is supported */
156#define NVGPU_GPU_FLAGS_SUPPORT_VPR (1ULL << 27) 156#define NVGPU_GPU_FLAGS_SUPPORT_VPR (1ULL << 27)
157/* Allocating per-channel syncpoint in user space is supported */
158#define NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT (1ULL << 28)
157/* SM LRF ECC is enabled */ 159/* SM LRF ECC is enabled */
158#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60) 160#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
159/* SM SHM ECC is enabled */ 161/* SM SHM ECC is enabled */
@@ -1648,6 +1650,12 @@ struct nvgpu_boosted_ctx_args {
1648 __u32 padding; 1650 __u32 padding;
1649}; 1651};
1650 1652
1653struct nvgpu_get_user_syncpoint_args {
1654 __u64 gpu_va; /* out */
1655 __u32 syncpoint_id; /* out */
1656 __u32 syncpoint_max; /* out */
1657};
1658
1651#define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \ 1659#define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \
1652 _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args) 1660 _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args)
1653#define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \ 1661#define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \
@@ -1698,9 +1706,11 @@ struct nvgpu_boosted_ctx_args {
1698 _IOW(NVGPU_IOCTL_MAGIC, 124, struct nvgpu_boosted_ctx_args) 1706 _IOW(NVGPU_IOCTL_MAGIC, 124, struct nvgpu_boosted_ctx_args)
1699#define NVGPU_IOCTL_CHANNEL_GET_TIMESLICE \ 1707#define NVGPU_IOCTL_CHANNEL_GET_TIMESLICE \
1700 _IOW(NVGPU_IOCTL_MAGIC, 125, struct nvgpu_timeslice_args) 1708 _IOW(NVGPU_IOCTL_MAGIC, 125, struct nvgpu_timeslice_args)
1709#define NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT \
1710 _IOR(NVGPU_IOCTL_MAGIC, 126, struct nvgpu_get_user_syncpoint_args)
1701 1711
1702#define NVGPU_IOCTL_CHANNEL_LAST \ 1712#define NVGPU_IOCTL_CHANNEL_LAST \
1703 _IOC_NR(NVGPU_IOCTL_CHANNEL_GET_TIMESLICE) 1713 _IOC_NR(NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT)
1704#define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_alloc_gpfifo_ex_args) 1714#define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_alloc_gpfifo_ex_args)
1705 1715
1706/* 1716/*