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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-10-06 15:44:37 -0400 |
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committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-12-07 12:52:47 -0500 |
commit | 8cdd72996c3973490589819e9b462283369bd77b (patch) | |
tree | ed2ab0f9d09d4c800d865eeeacee62ed76edcd2e /include | |
parent | 1ee25b11c519089da3fdfb299c37eb64d39a2213 (diff) |
gpu: nvgpu: gm20b: Add tile caching registers
Add tile caching related registers to access map.
Bug 1692373
Change-Id: I4516812dd571bed3be2dfa2b210abe3177e794fe
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/812354
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions