diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2017-11-06 07:25:47 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-06 15:27:35 -0500 |
commit | 8bdce5337ee5f4d1e1f6d4c7b2dc0abe4a532893 (patch) | |
tree | 26274011c5223478744127fe0edf60ca99bd1a35 /include | |
parent | 1480afeb013decec1d5451fd0d3eeaffa8e17bb6 (diff) |
gpu: nvgpu: support tuning per-ch deterministic opts
Add a new ioctl NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS to adjust
deterministic options on a per-channel basis. Currently, the only
supported option is to relax the no-railgating requirement on open
deterministic channels. This also disallows submits on such channels,
until the railgate option is reset.
Bug 200327089
Change-Id: If4f0f51fd1d40ad7407d13638150d7402479aff0
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1554563
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/uapi/linux/nvgpu.h | 44 |
1 files changed, 42 insertions, 2 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 29541031..b8e1e71c 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h | |||
@@ -148,7 +148,8 @@ struct nvgpu_gpu_zbc_query_table_args { | |||
148 | #define NVGPU_GPU_FLAGS_SUPPORT_RESCHEDULE_RUNLIST (1ULL << 21) | 148 | #define NVGPU_GPU_FLAGS_SUPPORT_RESCHEDULE_RUNLIST (1ULL << 21) |
149 | /* Direct PTE kind control is supported (map_buffer_ex) */ | 149 | /* Direct PTE kind control is supported (map_buffer_ex) */ |
150 | #define NVGPU_GPU_FLAGS_SUPPORT_MAP_DIRECT_KIND_CTRL (1ULL << 23) | 150 | #define NVGPU_GPU_FLAGS_SUPPORT_MAP_DIRECT_KIND_CTRL (1ULL << 23) |
151 | 151 | /* NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS is available */ | |
152 | #define NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_OPTS (1ULL << 24) | ||
152 | 153 | ||
153 | struct nvgpu_gpu_characteristics { | 154 | struct nvgpu_gpu_characteristics { |
154 | __u32 arch; | 155 | __u32 arch; |
@@ -801,6 +802,42 @@ struct nvgpu_gpu_set_therm_alert_limit_args { | |||
801 | __s32 temp_f24_8; | 802 | __s32 temp_f24_8; |
802 | }; | 803 | }; |
803 | 804 | ||
805 | /* | ||
806 | * Adjust options of deterministic channels in channel batches. | ||
807 | * | ||
808 | * This supports only one option currently: relax railgate blocking by | ||
809 | * "disabling" the channel. | ||
810 | * | ||
811 | * Open deterministic channels do not allow the GPU to railgate by default. It | ||
812 | * may be preferable to hold preopened channel contexts open and idle and still | ||
813 | * railgate the GPU, taking the channels back into use dynamically in userspace | ||
814 | * as an optimization. This ioctl allows to drop or reacquire the requirement | ||
815 | * to hold GPU power on for individual channels. If allow_railgate is set on a | ||
816 | * channel, no work can be submitted to it. | ||
817 | * | ||
818 | * num_channels is updated to signify how many channels were updated | ||
819 | * successfully. It can be used to test which was the first update to fail. | ||
820 | */ | ||
821 | struct nvgpu_gpu_set_deterministic_opts_args { | ||
822 | __u32 num_channels; /* in/out */ | ||
823 | /* | ||
824 | * Set or unset the railgating reference held by deterministic channels. If | ||
825 | * the channel status is already the same as the flag, this is a no-op. Both | ||
826 | * of these flags cannot be set at the same time. If none are set, the state | ||
827 | * is left as is. | ||
828 | */ | ||
829 | #define NVGPU_GPU_SET_DETERMINISTIC_OPTS_FLAGS_ALLOW_RAILGATING (1 << 0) | ||
830 | #define NVGPU_GPU_SET_DETERMINISTIC_OPTS_FLAGS_DISALLOW_RAILGATING (1 << 1) | ||
831 | __u32 flags; /* in */ | ||
832 | /* | ||
833 | * This is a pointer to an array of size num_channels. | ||
834 | * | ||
835 | * The channels have to be valid fds and be previously set as | ||
836 | * deterministic. | ||
837 | */ | ||
838 | __u64 channels; /* in */ | ||
839 | }; | ||
840 | |||
804 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ | 841 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ |
805 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) | 842 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) |
806 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ | 843 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ |
@@ -885,8 +922,11 @@ struct nvgpu_gpu_set_therm_alert_limit_args { | |||
885 | #define NVGPU_GPU_IOCTL_SET_THERM_ALERT_LIMIT \ | 922 | #define NVGPU_GPU_IOCTL_SET_THERM_ALERT_LIMIT \ |
886 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 39, \ | 923 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 39, \ |
887 | struct nvgpu_gpu_set_therm_alert_limit_args) | 924 | struct nvgpu_gpu_set_therm_alert_limit_args) |
925 | #define NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS \ | ||
926 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 40, \ | ||
927 | struct nvgpu_gpu_set_deterministic_opts_args) | ||
888 | #define NVGPU_GPU_IOCTL_LAST \ | 928 | #define NVGPU_GPU_IOCTL_LAST \ |
889 | _IOC_NR(NVGPU_GPU_IOCTL_SET_THERM_ALERT_LIMIT) | 929 | _IOC_NR(NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS) |
890 | #define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \ | 930 | #define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \ |
891 | sizeof(struct nvgpu_gpu_get_cpu_time_correlation_info_args) | 931 | sizeof(struct nvgpu_gpu_get_cpu_time_correlation_info_args) |
892 | 932 | ||