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authorThomas Fleury <tfleury@nvidia.com>2017-12-30 16:04:19 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-10 18:57:20 -0500
commit6b90684ceec6c32aed7491a059b3972b1f1be5f4 (patch)
tree0bc0fa73de0e352d8da8f360cac780c903c60d95 /include
parent5fb7c7d8f97bbec0d01f4f26aaf7757790c8b407 (diff)
gpu: nvgpu: vgpu: get virtual SMs mapping
On gv11b we can have multiple SMs per TPC. Add sm_per_tpc in vgpu constants to properly dimension the virtual SM to TPC/GPC mapping in virtualization case. Use TEGRA_VGPU_CMD_GET_SMS_MAPPING to query current mapping. Bug 2039676 Change-Id: I817be18f9a28cfb9bd8af207d7d6341a2ec3994b Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1631203 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/tegra_vgpu.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 7b5c9e11..74148294 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Tegra GPU Virtualization Interfaces to Server 2 * Tegra GPU Virtualization Interfaces to Server
3 * 3 *
4 * Copyright (c) 2014-2017, NVIDIA Corporation. All rights reserved. 4 * Copyright (c) 2014-2018, NVIDIA Corporation. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -111,6 +111,7 @@ enum {
111 TEGRA_VGPU_CMD_PERFBUF_MGT = 73, 111 TEGRA_VGPU_CMD_PERFBUF_MGT = 73,
112 TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74, 112 TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74,
113 TEGRA_VGPU_CMD_TSG_RELEASE = 75, 113 TEGRA_VGPU_CMD_TSG_RELEASE = 75,
114 TEGRA_VGPU_CMD_GET_VSMS_MAPPING = 76,
114}; 115};
115 116
116struct tegra_vgpu_connect_params { 117struct tegra_vgpu_connect_params {
@@ -482,6 +483,7 @@ struct tegra_vgpu_constants_params {
482 u32 channel_base; 483 u32 channel_base;
483 struct tegra_vgpu_engines_info engines_info; 484 struct tegra_vgpu_engines_info engines_info;
484 u32 num_pce; 485 u32 num_pce;
486 u32 sm_per_tpc;
485}; 487};
486 488
487struct tegra_vgpu_channel_cyclestats_snapshot_params { 489struct tegra_vgpu_channel_cyclestats_snapshot_params {
@@ -530,6 +532,17 @@ struct tegra_vgpu_get_gpu_freq_table_params {
530 u32 freqs[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE]; /* in kHz */ 532 u32 freqs[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE]; /* in kHz */
531}; 533};
532 534
535struct tegra_vgpu_vsms_mapping_params {
536 u32 num_sm;
537};
538
539struct tegra_vgpu_vsms_mapping_entry {
540 u32 gpc_index;
541 u32 tpc_index;
542 u32 sm_index;
543 u32 global_tpc_index;
544};
545
533struct tegra_vgpu_cmd_msg { 546struct tegra_vgpu_cmd_msg {
534 u32 cmd; 547 u32 cmd;
535 int ret; 548 int ret;
@@ -584,6 +597,7 @@ struct tegra_vgpu_cmd_msg {
584 struct tegra_vgpu_perfbuf_mgt_params perfbuf_management; 597 struct tegra_vgpu_perfbuf_mgt_params perfbuf_management;
585 struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper; 598 struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper;
586 struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table; 599 struct tegra_vgpu_get_gpu_freq_table_params get_gpu_freq_table;
600 struct tegra_vgpu_vsms_mapping_params vsms_mapping;
587#ifdef CONFIG_TEGRA_19x_GPU 601#ifdef CONFIG_TEGRA_19x_GPU
588 union tegra_vgpu_t19x_params t19x; 602 union tegra_vgpu_t19x_params t19x;
589#endif 603#endif