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author | Deepak Nibade <dnibade@nvidia.com> | 2015-09-24 05:26:44 -0400 |
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committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-10-16 11:23:49 -0400 |
commit | 68099f8298d25e94579f7d45c61b959f2c7ac184 (patch) | |
tree | 9f5b75f3d8c28f3110bb3177c7ad69156bf96386 /include | |
parent | 5b7b59714a6f6ea34295e4827eca68f496f5df18 (diff) |
gpu: nvgpu: fix pbdma intr handling
To handle any of the pbdma interrupt, we currently write zero
to pbdma_method0 and then clear the interrupt
But this is insufficient since we cannot use same intr clear
method for all the interrupts
Hence, add intr specific routines to handle those interrupts
NV_PPBDMA_INTR_0_PBENTRY:
- fix the pb_header to have a null opcode
- fix the pbdma_method to have a valid nop
NV_PPBDMA_INTR_0_METHOD:
- fix the pbdma_method to have a valid nop
NV_PPBDMA_INTR_0_DEVICE:
- fix the pb_header to have a null opcode
- go through all pbdma_method0/1/2/3
-- if they contain host s/w methods, replace those
methods with a valid NOP
Bug 200134238
Change-Id: I10c284a6cdc1441f9d437cea65aae00d3c33a8c8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/814561
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions