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authorRichard Zhao <rizhao@nvidia.com>2016-02-09 18:22:16 -0500
committerVladislav Buzov <vbuzov@nvidia.com>2016-02-11 13:27:37 -0500
commit5b7588a50ba8d2ed1c07627bbb015ded573ac1c1 (patch)
treeb140145bddc592dcdd2525e2b862ad789ddc023c /include
parent9f7613945c83f2bf8865bb3cfd61c238bcd36002 (diff)
gpu: nvgpu: add characteristics flag NVGPU_GPU_FLAGS_SUPPORT_TSG
NVGPU_GPU_FLAGS_SUPPORT_TSG indicates both the kernel driver and device support time slice group (TSG). Bug 1617046 Bug 200155618 Change-Id: Ib3490a32b773222560c58f1fd6d32bffcb97d6cd Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1010173 Reviewed-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/linux/nvgpu.h16
1 files changed, 9 insertions, 7 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 80ac159e..442a84ac 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -95,19 +95,21 @@ struct nvgpu_gpu_zbc_query_table_args {
95#define NVGPU_GPU_BUS_TYPE_NONE 0 95#define NVGPU_GPU_BUS_TYPE_NONE 0
96#define NVGPU_GPU_BUS_TYPE_AXI 32 96#define NVGPU_GPU_BUS_TYPE_AXI 32
97 97
98#define NVGPU_GPU_FLAGS_HAS_SYNCPOINTS (1 << 0) 98#define NVGPU_GPU_FLAGS_HAS_SYNCPOINTS (1ULL << 0)
99/* MAP_BUFFER_EX with partial mappings */ 99/* MAP_BUFFER_EX with partial mappings */
100#define NVGPU_GPU_FLAGS_SUPPORT_PARTIAL_MAPPINGS (1 << 1) 100#define NVGPU_GPU_FLAGS_SUPPORT_PARTIAL_MAPPINGS (1ULL << 1)
101/* MAP_BUFFER_EX with sparse allocations */ 101/* MAP_BUFFER_EX with sparse allocations */
102#define NVGPU_GPU_FLAGS_SUPPORT_SPARSE_ALLOCS (1 << 2) 102#define NVGPU_GPU_FLAGS_SUPPORT_SPARSE_ALLOCS (1ULL << 2)
103/* sync fence FDs are available in, e.g., submit_gpfifo */ 103/* sync fence FDs are available in, e.g., submit_gpfifo */
104#define NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS (1 << 3) 104#define NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS (1ULL << 3)
105/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */ 105/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */
106#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1 << 4) 106#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1ULL << 4)
107/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ 107/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */
108#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1 << 6) 108#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1ULL << 6)
109/* User-space managed address spaces support */ 109/* User-space managed address spaces support */
110#define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1 << 7) 110#define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1ULL << 7)
111/* Both gpu driver and device support TSG */
112#define NVGPU_GPU_FLAGS_SUPPORT_TSG (1ULL << 8)
111 113
112struct nvgpu_gpu_characteristics { 114struct nvgpu_gpu_characteristics {
113 __u32 arch; 115 __u32 arch;