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authorDebarshi Dutta <ddutta@nvidia.com>2019-08-07 02:27:28 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-08-15 03:57:45 -0400
commit58ee7561f72653aea8acece9f5d33ff8fe6fb99d (patch)
tree9af9a5b706a9cdb52a0e32e2364edbe93dbdd69a /include
parentae175e45edc5807131dfb1b63d3e4795e96a3f86 (diff)
gpu: nvgpu: Add CHANNEL_SETUP_BIND IOCTL
For a long time now, the ALLOC_GPFIFO_EX channel IOCTL has done much more than just gpfifo allocation, and its signature does not match support that's needed soon. Add a new one called SETUP_BIND to hopefully cover our future needs and deprecate ALLOC_GPFIFO_EX. Change nvgpu internals to match this new naming as well. Bug 200145225 Bug 200541476 Change-Id: I766f9283a064e140656f6004b2b766db70bd6cad Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1835186 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry-picked from e0c8a16c8d474eac6723fea3980833873ab921a6 in dev-main) Reviewed-on: https://git-master.nvidia.com/r/2169882 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/linux/nvgpu.h36
1 files changed, 25 insertions, 11 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 1d803ae9..0fa04f6b 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -1468,22 +1468,32 @@ struct nvgpu_alloc_obj_ctx_args {
1468 __u64 obj_id; /* output, used to free later */ 1468 __u64 obj_id; /* output, used to free later */
1469}; 1469};
1470 1470
1471/* Deprecated. Use the SETUP_BIND IOCTL instead. */
1471struct nvgpu_alloc_gpfifo_args { 1472struct nvgpu_alloc_gpfifo_args {
1472 __u32 num_entries; 1473 __u32 num_entries;
1473#define NVGPU_ALLOC_GPFIFO_FLAGS_VPR_ENABLED (1 << 0) /* set owner channel of this gpfifo as a vpr channel */ 1474#define NVGPU_ALLOC_GPFIFO_FLAGS_VPR_ENABLED (1 << 0)
1474/*
1475 * this flag is used in struct nvgpu_alloc_gpfifo_args
1476 * to enable re-playable faults for that channel
1477 */
1478#define NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2) 1475#define NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2)
1479 __u32 flags; 1476 __u32 flags;
1480}; 1477};
1481 1478
1479/* Deprecated. Use the SETUP_BIND IOCTL instead. */
1482struct nvgpu_alloc_gpfifo_ex_args { 1480struct nvgpu_alloc_gpfifo_ex_args {
1483 __u32 num_entries; 1481 __u32 num_entries;
1484 __u32 num_inflight_jobs; 1482 __u32 num_inflight_jobs;
1485/* Set owner channel of this gpfifo as a vpr channel. */
1486#define NVGPU_ALLOC_GPFIFO_EX_FLAGS_VPR_ENABLED (1 << 0) 1483#define NVGPU_ALLOC_GPFIFO_EX_FLAGS_VPR_ENABLED (1 << 0)
1484#define NVGPU_ALLOC_GPFIFO_EX_FLAGS_DETERMINISTIC (1 << 1)
1485 __u32 flags;
1486 __u32 reserved[5];
1487};
1488
1489/*
1490 * Setup the channel and bind it (enable).
1491 */
1492struct nvgpu_channel_setup_bind_args {
1493 __u32 num_gpfifo_entries;
1494 __u32 num_inflight_jobs;
1495/* Set owner channel of this gpfifo as a vpr channel. */
1496#define NVGPU_CHANNEL_SETUP_BIND_FLAGS_VPR_ENABLED (1 << 0)
1487/* 1497/*
1488 * Channel shall exhibit deterministic behavior in the submit path. 1498 * Channel shall exhibit deterministic behavior in the submit path.
1489 * 1499 *
@@ -1501,11 +1511,12 @@ struct nvgpu_alloc_gpfifo_ex_args {
1501 * NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING; this flag or 1511 * NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING; this flag or
1502 * num_inflight_jobs are not necessary in that case. 1512 * num_inflight_jobs are not necessary in that case.
1503 */ 1513 */
1504#define NVGPU_ALLOC_GPFIFO_EX_FLAGS_DETERMINISTIC (1 << 1) 1514#define NVGPU_CHANNEL_SETUP_BIND_FLAGS_DETERMINISTIC (1 << 1)
1515/* enable replayable gmmu faults for this channel */
1516#define NVGPU_CHANNEL_SETUP_BIND_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2)
1505 __u32 flags; 1517 __u32 flags;
1506 __u32 reserved[5]; 1518 __u32 reserved[16];
1507}; 1519};
1508
1509struct nvgpu_fence { 1520struct nvgpu_fence {
1510 __u32 id; /* syncpoint id or sync fence fd */ 1521 __u32 id; /* syncpoint id or sync fence fd */
1511 __u32 value; /* syncpoint value (discarded when using sync fence) */ 1522 __u32 value; /* syncpoint value (discarded when using sync fence) */
@@ -1763,10 +1774,13 @@ struct nvgpu_reschedule_runlist_args {
1763 _IOR(NVGPU_IOCTL_MAGIC, 126, struct nvgpu_get_user_syncpoint_args) 1774 _IOR(NVGPU_IOCTL_MAGIC, 126, struct nvgpu_get_user_syncpoint_args)
1764#define NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST \ 1775#define NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST \
1765 _IOW(NVGPU_IOCTL_MAGIC, 127, struct nvgpu_reschedule_runlist_args) 1776 _IOW(NVGPU_IOCTL_MAGIC, 127, struct nvgpu_reschedule_runlist_args)
1777#define NVGPU_IOCTL_CHANNEL_SETUP_BIND \
1778 _IOWR(NVGPU_IOCTL_MAGIC, 128, struct nvgpu_channel_setup_bind_args)
1766 1779
1767#define NVGPU_IOCTL_CHANNEL_LAST \ 1780#define NVGPU_IOCTL_CHANNEL_LAST \
1768 _IOC_NR(NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST) 1781 _IOC_NR(NVGPU_IOCTL_CHANNEL_SETUP_BIND)
1769#define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_alloc_gpfifo_ex_args) 1782#define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE \
1783 sizeof(struct nvgpu_channel_setup_bind_args)
1770 1784
1771/* 1785/*
1772 * /dev/nvhost-as-gpu device 1786 * /dev/nvhost-as-gpu device