diff options
author | Richard Zhao <rizhao@nvidia.com> | 2016-05-23 21:35:34 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-06-09 18:17:41 -0400 |
commit | 3735dba6f83e8de21eb2db620402d0ea9fd28835 (patch) | |
tree | 7b7b623c6c75824d769c28537ebfd1f6474182fc /include | |
parent | c624f35383ab15f86d6a4ecac751d0836f154acf (diff) |
gpu: nvgpu: vgpu: add general event support
Events like bpt int/pause will help cuda work properly.
Bug 200173403
VFND-1568
Change-Id: I29e534969028bf08aedd81c99f5a536779f431d1
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1159621
(cherry picked from commit a266e53c514639e15ed166e2c8ce5a55efc48eda)
Reviewed-on: http://git-master/r/1152154
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/tegra_vgpu.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index e6e03459..9a31ff40 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -483,6 +483,12 @@ struct tegra_vgpu_fecs_trace_event_info { | |||
483 | u32 type; | 483 | u32 type; |
484 | }; | 484 | }; |
485 | 485 | ||
486 | struct tegra_vgpu_general_event_info { | ||
487 | u32 event_id; | ||
488 | u32 is_tsg; | ||
489 | u32 id; /* channel id or tsg id */ | ||
490 | }; | ||
491 | |||
486 | enum { | 492 | enum { |
487 | 493 | ||
488 | TEGRA_VGPU_INTR_GR = 0, | 494 | TEGRA_VGPU_INTR_GR = 0, |
@@ -496,7 +502,8 @@ enum { | |||
496 | enum { | 502 | enum { |
497 | TEGRA_VGPU_EVENT_INTR = 0, | 503 | TEGRA_VGPU_EVENT_INTR = 0, |
498 | TEGRA_VGPU_EVENT_ABORT, | 504 | TEGRA_VGPU_EVENT_ABORT, |
499 | TEGRA_VGPU_EVENT_FECS_TRACE | 505 | TEGRA_VGPU_EVENT_FECS_TRACE, |
506 | TEGRA_VGPU_EVENT_CHANNEL, | ||
500 | }; | 507 | }; |
501 | 508 | ||
502 | struct tegra_vgpu_intr_msg { | 509 | struct tegra_vgpu_intr_msg { |
@@ -509,6 +516,7 @@ struct tegra_vgpu_intr_msg { | |||
509 | struct tegra_vgpu_fifo_nonstall_intr_info fifo_nonstall_intr; | 516 | struct tegra_vgpu_fifo_nonstall_intr_info fifo_nonstall_intr; |
510 | struct tegra_vgpu_ce2_nonstall_intr_info ce2_nonstall_intr; | 517 | struct tegra_vgpu_ce2_nonstall_intr_info ce2_nonstall_intr; |
511 | struct tegra_vgpu_fecs_trace_event_info fecs_trace; | 518 | struct tegra_vgpu_fecs_trace_event_info fecs_trace; |
519 | struct tegra_vgpu_general_event_info general_event; | ||
512 | char padding[32]; | 520 | char padding[32]; |
513 | } info; | 521 | } info; |
514 | }; | 522 | }; |