summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorSami Kiminki <skiminki@nvidia.com>2015-10-26 13:23:54 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-11-17 15:38:44 -0500
commit30632cec54048944ee364781b4b8c2676ae5dfed (patch)
tree2d58fe57b8f80eb747aa1f8e3923f982870a9a16 /include
parent5a24e95fe605a2e7ec4d1a126c9bffd64bd77590 (diff)
gpu: nvgpu: Implement NVGPU_GPU_IOCTL_GET_BUFFER_INFO
Implement NVGPU_GPU_IOCTL_GET_BUFFER_INFO. The new IOCTL can be used to identify buffers and retrieve their sizes. This allows the userspace to be agnostic to the dmabuf implementation, as the generic dmabuf fd interface does not have a reliable way for buffer identification. Bug 1614735 Bug 1623949 Bug 1660392 Change-Id: Ic3dd0a9385c9852778110ccb80636dd6f4f36208 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: http://git-master/r/822845 Reviewed-on: http://git-master/r/833252 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/linux/nvgpu.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 6024edee..6a8e44c5 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -314,6 +314,22 @@ struct nvgpu_gpu_vsms_mapping {
314 __u64 vsms_map_buf_addr; 314 __u64 vsms_map_buf_addr;
315}; 315};
316 316
317struct nvgpu_gpu_get_buffer_info_args {
318 union {
319 struct {
320 __u32 dmabuf_fd; /* dma-buf fd */
321 } in;
322 struct {
323 __u64 id; /* Unique within live
324 * buffers */
325 __u64 length; /* Allocated length of the
326 * buffer */
327 __u64 reserved0;
328 __u64 reserved1;
329 } out;
330 };
331};
332
317#define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ 333#define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \
318 _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) 334 _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args)
319#define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ 335#define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \
@@ -352,9 +368,11 @@ struct nvgpu_gpu_vsms_mapping {
352 _IOWR(NVGPU_GPU_IOCTL_MAGIC, 18, struct nvgpu_gpu_num_vsms) 368 _IOWR(NVGPU_GPU_IOCTL_MAGIC, 18, struct nvgpu_gpu_num_vsms)
353#define NVGPU_GPU_IOCTL_VSMS_MAPPING \ 369#define NVGPU_GPU_IOCTL_VSMS_MAPPING \
354 _IOWR(NVGPU_GPU_IOCTL_MAGIC, 19, struct nvgpu_gpu_vsms_mapping) 370 _IOWR(NVGPU_GPU_IOCTL_MAGIC, 19, struct nvgpu_gpu_vsms_mapping)
371#define NVGPU_GPU_IOCTL_GET_BUFFER_INFO \
372 _IOWR(NVGPU_GPU_IOCTL_MAGIC, 20, struct nvgpu_gpu_get_buffer_info_args)
355 373
356#define NVGPU_GPU_IOCTL_LAST \ 374#define NVGPU_GPU_IOCTL_LAST \
357 _IOC_NR(NVGPU_GPU_IOCTL_VSMS_MAPPING) 375 _IOC_NR(NVGPU_GPU_IOCTL_GET_BUFFER_INFO)
358#define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \ 376#define NVGPU_GPU_IOCTL_MAX_ARG_SIZE \
359 sizeof(struct nvgpu_gpu_prepare_compressible_read_args) 377 sizeof(struct nvgpu_gpu_prepare_compressible_read_args)
360 378