diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2016-10-21 19:43:47 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-09 23:24:07 -0500 |
commit | dfb061cbdbc0a87391e475b5d86303cb028eb549 (patch) | |
tree | ba0be402c85d13be093467f8877e3174a771c683 /include/uapi | |
parent | 71ecc8f660503eed4a094b1b1531e8e92a6de0bb (diff) |
gpu: nvgpu: get voltage, current, power and temperature
Add ioctls to retrieve voltage, current, power and temperature.
Add flags in GPU characteristics to indicate if feature is supported.
Jira DNVGPU-166
Change-Id: Idd5a767326c9d43630e8289ca7d2c27bb96a9f14
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1241862
Tested-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1267153
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/linux/nvgpu.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 13492e0d..f45be911 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h | |||
@@ -721,6 +721,31 @@ struct nvgpu_gpu_get_fbp_l2_masks_args { | |||
721 | __u64 mask_buf_addr; | 721 | __u64 mask_buf_addr; |
722 | }; | 722 | }; |
723 | 723 | ||
724 | #define NVGPU_GPU_VOLTAGE_CORE 1 | ||
725 | #define NVGPU_GPU_VOLTAGE_SRAM 2 | ||
726 | #define NVGPU_GPU_VOLTAGE_BUS 3 /* input to regulator */ | ||
727 | |||
728 | struct nvgpu_gpu_get_voltage_args { | ||
729 | __u64 reserved; | ||
730 | __u32 which; /* in: NVGPU_GPU_VOLTAGE_* */ | ||
731 | __u32 voltage; /* uV */ | ||
732 | }; | ||
733 | |||
734 | struct nvgpu_gpu_get_current_args { | ||
735 | __u32 reserved[3]; | ||
736 | __u32 currnt; /* mA */ | ||
737 | }; | ||
738 | |||
739 | struct nvgpu_gpu_get_power_args { | ||
740 | __u32 reserved[3]; | ||
741 | __u32 power; /* mW */ | ||
742 | }; | ||
743 | |||
744 | struct nvgpu_gpu_get_temperature_args { | ||
745 | __u32 reserved[3]; | ||
746 | __u32 temperature; /* mC */ | ||
747 | }; | ||
748 | |||
724 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ | 749 | #define NVGPU_GPU_IOCTL_ZCULL_GET_CTX_SIZE \ |
725 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) | 750 | _IOR(NVGPU_GPU_IOCTL_MAGIC, 1, struct nvgpu_gpu_zcull_get_ctx_size_args) |
726 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ | 751 | #define NVGPU_GPU_IOCTL_ZCULL_GET_INFO \ |
@@ -792,6 +817,14 @@ struct nvgpu_gpu_get_fbp_l2_masks_args { | |||
792 | #define NVGPU_GPU_IOCTL_GET_MEMORY_STATE \ | 817 | #define NVGPU_GPU_IOCTL_GET_MEMORY_STATE \ |
793 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 33, \ | 818 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 33, \ |
794 | struct nvgpu_gpu_get_memory_state_args) | 819 | struct nvgpu_gpu_get_memory_state_args) |
820 | #define NVGPU_GPU_IOCTL_GET_VOLTAGE \ | ||
821 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 33, struct nvgpu_gpu_get_voltage_args) | ||
822 | #define NVGPU_GPU_IOCTL_GET_CURRENT \ | ||
823 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 34, struct nvgpu_gpu_get_current_args) | ||
824 | #define NVGPU_GPU_IOCTL_GET_POWER \ | ||
825 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 35, struct nvgpu_gpu_get_power_args) | ||
826 | #define NVGPU_GPU_IOCTL_GET_TEMPERATURE \ | ||
827 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 36, struct nvgpu_gpu_get_temperature_args) | ||
795 | #define NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS \ | 828 | #define NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS \ |
796 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 38, struct nvgpu_gpu_get_fbp_l2_masks_args) | 829 | _IOWR(NVGPU_GPU_IOCTL_MAGIC, 38, struct nvgpu_gpu_get_fbp_l2_masks_args) |
797 | #define NVGPU_GPU_IOCTL_LAST \ | 830 | #define NVGPU_GPU_IOCTL_LAST \ |