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author | Seema Khowala <seemaj@nvidia.com> | 2017-06-20 18:31:46 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-29 16:29:41 -0400 |
commit | 11009e0e69a497780ddb918fab89da62089510ce (patch) | |
tree | d9b7e873f298205f7288c5faad352ae5805c8e68 /include/uapi | |
parent | 7681d6b007755e16f55951a1491a38faff8c72e9 (diff) |
gpu: nvgpu: gv11b: sm register changes
gv11b has multiple SMs and SM register addresses
have changed as compared to legacy chips.
JIRA GPUT19X-75
Change-Id: I2319f4c78f3efda3430bab1f5ecf1a068e57a1ca
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1506013
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/uapi')
0 files changed, 0 insertions, 0 deletions