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author | Leonid Moiseichuk <lmoiseichuk@nvidia.com> | 2015-05-08 08:06:42 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-06-06 10:23:24 -0400 |
commit | 837ceffcab417865db8adbdf1a2038ebde8ec1a5 (patch) | |
tree | 8890ac07cd6cca9d5cff054dd899a8f6052b0669 /include/uapi/linux | |
parent | ef8fa4999fcd8c01275ef3790b0abd5e69c55ea5 (diff) |
gpu: nvgpu: cyclestats mode E snapshots support
That is a kernel supporting code for cyclestats mode E.
Cyclestats mode E implemented following Windows-design in user-space
and required the following operations to be implemented:
- attach a client for shared hardware buffer of device
- detach client from shared hardware buffer
- flush means copy of available data from hardware buffer to private
client buffers according to perfmon IDs assigned for clients
- perfmon IDs management for user-space clients
- a NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT capability added
Bug 1573150
Change-Id: I9e09f0fbb2be5a95c47e6d80a2e23fa839b46f9a
Signed-off-by: Leonid Moiseichuk <lmoiseichuk@nvidia.com>
Reviewed-on: http://git-master/r/740653
(cherry picked from commit 79fe89fd4cea39d8ab9dbef0558cd806ddfda87f)
Reviewed-on: http://git-master/r/753274
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include/uapi/linux')
-rw-r--r-- | include/uapi/linux/nvgpu.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index e5bb0d07..1367b7be 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h | |||
@@ -106,6 +106,8 @@ struct nvgpu_gpu_zbc_query_table_args { | |||
106 | #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1 << 4) | 106 | #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1 << 4) |
107 | /* MAP_BUFFER_EX with unmapped PTE */ | 107 | /* MAP_BUFFER_EX with unmapped PTE */ |
108 | #define NVGPU_GPU_FLAGS_SUPPORT_UNMAPPED_PTE (1 << 5) | 108 | #define NVGPU_GPU_FLAGS_SUPPORT_UNMAPPED_PTE (1 << 5) |
109 | /* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ | ||
110 | #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1 << 6) | ||
109 | 111 | ||
110 | struct nvgpu_gpu_characteristics { | 112 | struct nvgpu_gpu_characteristics { |
111 | __u32 arch; | 113 | __u32 arch; |
@@ -731,6 +733,21 @@ struct nvgpu_channel_events_ctrl_args { | |||
731 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_ENABLE 1 | 733 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_ENABLE 1 |
732 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_CLEAR 2 | 734 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_CLEAR 2 |
733 | 735 | ||
736 | /* cycle stats snapshot buffer support for mode E */ | ||
737 | struct nvgpu_cycle_stats_snapshot_args { | ||
738 | __u32 cmd; /* in: command to handle */ | ||
739 | __u32 dmabuf_fd; /* in: dma buffer handler */ | ||
740 | __u32 extra; /* in/out: extra payload e.g.*/ | ||
741 | /* counter/start perfmon */ | ||
742 | __u32 pad0[1]; | ||
743 | }; | ||
744 | |||
745 | /* valid commands to control cycle stats shared buffer */ | ||
746 | #define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_FLUSH 0 | ||
747 | #define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_ATTACH 1 | ||
748 | #define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_DETACH 2 | ||
749 | |||
750 | |||
734 | #define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \ | 751 | #define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \ |
735 | _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args) | 752 | _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args) |
736 | #define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \ | 753 | #define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \ |
@@ -769,9 +786,11 @@ struct nvgpu_channel_events_ctrl_args { | |||
769 | _IO(NVGPU_IOCTL_MAGIC, 116) | 786 | _IO(NVGPU_IOCTL_MAGIC, 116) |
770 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL \ | 787 | #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL \ |
771 | _IOW(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_channel_events_ctrl_args) | 788 | _IOW(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_channel_events_ctrl_args) |
789 | #define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT \ | ||
790 | _IOWR(NVGPU_IOCTL_MAGIC, 118, struct nvgpu_cycle_stats_snapshot_args) | ||
772 | 791 | ||
773 | #define NVGPU_IOCTL_CHANNEL_LAST \ | 792 | #define NVGPU_IOCTL_CHANNEL_LAST \ |
774 | _IOC_NR(NVGPU_IOCTL_CHANNEL_EVENTS_CTRL) | 793 | _IOC_NR(NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT) |
775 | #define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_submit_gpfifo_args) | 794 | #define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_submit_gpfifo_args) |
776 | 795 | ||
777 | /* | 796 | /* |