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authorThomas Fleury <tfleury@nvidia.com>2016-10-14 13:41:07 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-12-09 23:24:06 -0500
commit8cfcf181f1e9b03324e4bb04450de154fdf9834d (patch)
treea54ef7f2c337d0ed96babeb3a3316a5b3867fdca /include/uapi/linux/nvgpu.h
parenta4731b328268e1d75429942f769252e3e0d41328 (diff)
gpu: nvgpu: add clocks control capability
Add NVGPU_GPU_FLAGS_SUPPORT_CLOCK_CONTROLS bit to allow user library to determine if GPU supports clock control ioctls. Jira DNVGPU-125 Change-Id: Ia09808ed36aa85a7c520039bb336888e2b467076 Signed-off-by: David Martine Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239379 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267154 Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'include/uapi/linux/nvgpu.h')
-rw-r--r--include/uapi/linux/nvgpu.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 49e3fc5c..13492e0d 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -116,6 +116,16 @@ struct nvgpu_gpu_zbc_query_table_args {
116#define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1ULL << 7) 116#define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1ULL << 7)
117/* Both gpu driver and device support TSG */ 117/* Both gpu driver and device support TSG */
118#define NVGPU_GPU_FLAGS_SUPPORT_TSG (1ULL << 8) 118#define NVGPU_GPU_FLAGS_SUPPORT_TSG (1ULL << 8)
119/* Clock control support */
120#define NVGPU_GPU_FLAGS_SUPPORT_CLOCK_CONTROLS (1ULL << 9)
121/* NVGPU_GPU_IOCTL_GET_VOLTAGE is available */
122#define NVGPU_GPU_FLAGS_SUPPORT_GET_VOLTAGE (1ULL << 10)
123/* NVGPU_GPU_IOCTL_GET_CURRENT is available */
124#define NVGPU_GPU_FLAGS_SUPPORT_GET_CURRENT (1ULL << 11)
125/* NVGPU_GPU_IOCTL_GET_POWER is available */
126#define NVGPU_GPU_FLAGS_SUPPORT_GET_POWER (1ULL << 12)
127/* NVGPU_GPU_IOCTL_GET_TEMPERATURE is available */
128#define NVGPU_GPU_FLAGS_SUPPORT_GET_TEMPERATURE (1ULL << 13)
119 129
120struct nvgpu_gpu_characteristics { 130struct nvgpu_gpu_characteristics {
121 __u32 arch; 131 __u32 arch;
@@ -671,7 +681,7 @@ struct nvgpu_gpu_clk_set_info_args {
671 this file descriptor to determine when the request has completed. 681 this file descriptor to determine when the request has completed.
672 The fd must be closed afterwards. 682 The fd must be closed afterwards.
673 */ 683 */
674 int completion_fd; 684 __s32 completion_fd;
675}; 685};
676 686
677struct nvgpu_gpu_clk_get_event_fd_args { 687struct nvgpu_gpu_clk_get_event_fd_args {
@@ -680,7 +690,7 @@ struct nvgpu_gpu_clk_get_event_fd_args {
680 __u32 flags; 690 __u32 flags;
681 691
682 /* out: File descriptor for events, i.e. any clock update. */ 692 /* out: File descriptor for events, i.e. any clock update. */
683 int event_fd; 693 __s32 event_fd;
684}; 694};
685 695
686struct nvgpu_gpu_get_memory_state_args { 696struct nvgpu_gpu_get_memory_state_args {