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author | Deepak Nibade <dnibade@nvidia.com> | 2016-04-19 07:28:28 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:54:54 -0500 |
commit | 6113c679a99ca09256d33a582a4dfe648e100c23 (patch) | |
tree | 50a30eb1fc31daa10be5f382e99c8995b0df5978 /include/uapi/linux/nvgpu-t18x.h | |
parent | 5237f4a2a143a6410cc2eac04a62511a637fd321 (diff) |
gpu: nvgpu: API to set preemption mode
Separate out new API gr_gp10b_set_ctxsw_preemption_mode()
which will check requested preemption modes and take appropriate
action for each preemption mode
This API will also do some sanity checking for valid
preemption modes and combinations
Define API set_preemption_mode() for gp10b which will set the
preemption modes passed as argument and then use
gr_gp10b_set_ctxsw_preemption_mode() and
update_ctxsw_preemption_mode() to update preemption mode
Legacy path from gr_gp10b_alloc_gr_ctx() will convert
flags NVGPU_ALLOC_OBJ_FLAGS_* into appropriate preemption modes
and then call gr_gp10b_set_ctxsw_preemption_mode()
New API set_preemption_mode() will use new flags
NVGPU_GRAPHICS/COMPUTE_PREEMPTION_MODE_* and set and update
ctxsw preemption mode
In gr_gp10b_update_ctxsw_preemption_mode(), update graphics
context to set CTA premption mode if mode
NVGPU_COMPUTE_PREEMPTION_MODE_CTA is set
Also, define preemption modes in nvgpu-t18x.h
and use them everywhere
Remove old definitions of modes from gr_gp10b.h
Bug 1646259
Change-Id: Ib4dc1fb9933b15d32f0122a9e52665b69402df18
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1131806
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include/uapi/linux/nvgpu-t18x.h')
-rw-r--r-- | include/uapi/linux/nvgpu-t18x.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/uapi/linux/nvgpu-t18x.h b/include/uapi/linux/nvgpu-t18x.h index e2696b4c..1dce0c21 100644 --- a/include/uapi/linux/nvgpu-t18x.h +++ b/include/uapi/linux/nvgpu-t18x.h | |||
@@ -43,6 +43,11 @@ | |||
43 | #define NVGPU_ALLOC_OBJ_FLAGS_GFXP (1 << 1) | 43 | #define NVGPU_ALLOC_OBJ_FLAGS_GFXP (1 << 1) |
44 | #define NVGPU_ALLOC_OBJ_FLAGS_CILP (1 << 2) | 44 | #define NVGPU_ALLOC_OBJ_FLAGS_CILP (1 << 2) |
45 | 45 | ||
46 | /* Flags in nvgpu_preemption_mode_args.graphics_preempt_flags */ | ||
47 | #define NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP BIT(1) | ||
48 | /* Flags in nvgpu_preemption_mode_args.compute_preempt_flags */ | ||
49 | #define NVGPU_COMPUTE_PREEMPTION_MODE_CILP BIT(2) | ||
50 | |||
46 | /* SM LRF ECC is enabled */ | 51 | /* SM LRF ECC is enabled */ |
47 | #define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60) | 52 | #define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60) |
48 | /* SM SHM ECC is enabled */ | 53 | /* SM SHM ECC is enabled */ |