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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-11 16:01:59 -0400 |
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committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-15 15:38:33 -0400 |
commit | 0e423669a4ff3f00b06d86f8ca251ef99f3671ce (patch) | |
tree | 637552c0c76d0a7a820d5cb8f359478d756e8c2a /include/trace | |
parent | 7d8e2193893454bc8e05543c956fab32b8eed54b (diff) |
gpu: nvgpu: Wait for BAR1 bind
Wait for BAR1 bind to complete before continuing. The register to
wait exists Maxwell onwards.
Change-Id: Ie3736033fdb748c5da8d7a6085ad6d63acaf41f5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1123941
Diffstat (limited to 'include/trace')
0 files changed, 0 insertions, 0 deletions