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authorRichard Zhao <rizhao@nvidia.com>2015-11-16 19:30:28 -0500
committerVladislav Buzov <vbuzov@nvidia.com>2015-11-23 13:20:54 -0500
commit8ec63298789a0912b9cbd90ee47c76f0701f0dca (patch)
tree34f8ba228b78dfde64ffc3badb86338aeb1159b2 /include/trace/events/gk20a.h
parent7f79d647d6f8beffc5d98d3b703f9408b5a05d14 (diff)
gpu: nvgpu: correct register setting for debug mode
correct register settings for both set mmu debug mode and set sm debug mode. JIRA VFND-1005 Bug 1594604 Change-Id: I1d4b1d4b4cdd9d24d3b00481e0e22c4217f5a4b3 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/833490 Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Diffstat (limited to 'include/trace/events/gk20a.h')
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