summaryrefslogtreecommitdiffstats
path: root/include/linux/tegra_vgpu_t19x.h
diff options
context:
space:
mode:
authorRichard Zhao <rizhao@nvidia.com>2018-01-10 19:06:30 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-12 15:43:40 -0500
commit9dd3bb2e62c321bb48c14f3e76c00a754cd12c5f (patch)
tree48e1242d3f17ae0ef02ef0f724c95ce5c30b6338 /include/linux/tegra_vgpu_t19x.h
parentece3d958b306f00dad76ed6f9b83ce136b4769f2 (diff)
gpu: nvgpu: vgpu: move t19x specific code to general code
- remove vgpu_t19x.h and tegra_vgpu_t19x.h - merge t19x specific ivc commands to the big enum - move TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT to constants Jira EVLR-2293 Change-Id: I34344bffa03bb69e1282b1f19382e3199f9ba105 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1636128 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu_t19x.h')
-rw-r--r--include/linux/tegra_vgpu_t19x.h55
1 files changed, 0 insertions, 55 deletions
diff --git a/include/linux/tegra_vgpu_t19x.h b/include/linux/tegra_vgpu_t19x.h
deleted file mode 100644
index 38dbbf60..00000000
--- a/include/linux/tegra_vgpu_t19x.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#ifndef __TEGRA_VGPU_T19X_H
15#define __TEGRA_VGPU_T19X_H
16
17#define TEGRA_VGPU_CMD_ALLOC_CTX_HEADER 100
18#define TEGRA_VGPU_CMD_FREE_CTX_HEADER 101
19#define TEGRA_VGPU_CMD_MAP_SYNCPT 102
20#define TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX 103
21
22struct tegra_vgpu_alloc_ctx_header_params {
23 u64 ch_handle;
24 u64 ctx_header_va;
25};
26
27struct tegra_vgpu_free_ctx_header_params {
28 u64 ch_handle;
29};
30
31struct tegra_vgpu_map_syncpt_params {
32 u64 as_handle;
33 u64 gpu_va;
34 u64 len;
35 u64 offset;
36 u8 prot;
37};
38
39struct tegra_vgpu_tsg_bind_channel_ex_params {
40 u32 tsg_id;
41 u64 ch_handle;
42 u32 subctx_id;
43 u32 runqueue_sel;
44};
45
46union tegra_vgpu_t19x_params {
47 struct tegra_vgpu_alloc_ctx_header_params alloc_ctx_header;
48 struct tegra_vgpu_free_ctx_header_params free_ctx_header;
49 struct tegra_vgpu_map_syncpt_params map_syncpt;
50 struct tegra_vgpu_tsg_bind_channel_ex_params tsg_bind_channel_ex;
51};
52
53#define TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT 100
54
55#endif